Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-07-19
2005-07-19
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06920621
ABSTRACT:
Methods of testing for shorts (e.g., bridging defects) between interconnect lines in an integrated circuit. For example, in a design implemented in a programmable logic device (PLD), some interconnect lines are used and others are unused. To test for shorts between the used and unused interconnect lines, both used and unused interconnect lines are driven to a first logic level, and the leakage current is measured. The used interconnect lines are driven to a second logic level, while the unused lines remain at the first logic level. The current is again measured, and the difference between the two measurements is determined. If the difference exceeds a predetermined threshold, the device design combination is rejected. Some embodiments provide methods of testing for shorts between used and unused interconnect lines for a design targeted to a partially defective PLD.
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Chmelar Erik V.
Toutounchi Shahin
Wells Robert W.
Cartier Lois D.
Whitmore Stacy A.
Xilinx , Inc.
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