Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-24
2007-07-24
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
11590132
ABSTRACT:
Methods of routing a design in a programmable logic device (PLD) to increase the effectiveness of applying a multi-frame write (MFW) compression technique to the resulting configuration bitstream. The methods apply placement patterns and/or routing templates to encourage the inclusion of numbers of duplicated routing paths in the routed design. The duplicated routing paths result in duplicated configuration data. Thus, a configuration bitstream implementing the routed design in the PLD includes numbers of duplicated configuration data frames, and is well-suited to benefit from MFW compression techniques.
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Krishnamurthy Sridhar
Lindholm Jeffrey V.
Young Jay T.
Cartier Lois D.
Chiang Jack
Doan Nghia M.
Maunu LeRoy D.
Xilinx , Inc.
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