Static information storage and retrieval – Floating gate – Particular connection
Patent
1996-09-19
1997-10-14
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular connection
36518526, G11C 1134
Patent
active
056778732
ABSTRACT:
Methods of programming flash EEPROM integrated circuit memory devices containing an array of NAND cells therein include the steps of applying a preselected logic signal to a select transistor of a NAND memory cell to inhibit the likelihood of inadvertent programming thereof when adjacent cells are being programmed. According to one embodiment, a first logic signal having a first non-zero potential (V.sub.fp) is applied to a bit line BL of a first NAND memory cell in the array. Then, at commencement of a first time interval (TI), a second logic signal having a second potential which is greater than the first potential is applied to the gate (SSL) of the first select transistor ST1 to thereby turn-on the first select transistor "hard" and drive the potential of a source (S) thereof towards the potential of the bit line (i.e., V.sub.fp). Here, the first potential V.sub.fp is preferably selected to be higher than the power supply voltage VCC. Then, upon termination of the first time interval TI, the potential of the second bilevel logic signal is reduced from the second potential to the first potential V.sub.fp (or ground GND) to thereby limit conduction across the channel of the first select transistor ST1 and electrically isolate the bit line BL from the source, drain and channel regions of the EEPROM transistors in the first NAND memory cell. Preferably following termination of the first time interval, a pass logic signal having a pass potential (V.sub.pass) and a program logic signal having a program potential (V.sub.pgm) (where V.sub.pgm >V.sub.pass) are applied to the gates of a plurality of unselected EEPROM transistors and the gate of a "selected" EEPROM transistor in the first NAND memory cell.
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patent: 5473563 (1995-12-01), Suh et al.
patent: 5568420 (1996-10-01), Lim et al.
patent: 5570315 (1996-10-01), Tanaka et al.
B. Prince et al., Semiconductor Memories, A Handbook of Designs Manufacture and Application, Second Edition, John Wiley & Sons Ltd., pp. 185-187 and 603-604, 1991.
Choi Byeng-Sun
Jung Tae-Sung
Nelms David C.
Samsung Electronics Co,. Ltd.
Tran Michael T.
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