Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-08-05
2008-08-12
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S758000, C438S795000, C438S800000, C257SE21002
Reexamination Certificate
active
07410903
ABSTRACT:
The invention includes a template comprising one or both of CdS and CdSe adhered to a base in a desired pattern. The base can be any transparent or translucent material, and the desired pattern can include two or more separated segments. The template can be utilized for patterning a plurality of substrates. For instance, the substrates can be provided to have masking layers thereover, and the CdS and/or CdSe can be utilized as catalytic material to sequentially impart patterns in the masking layers. The imparting of the patterns can modify some regions of the masking layers relative to others, and either the modified or unmodified regions can be selectively removed to form patterned masks from the masking layers. Patterns from the patterned masks can then be transferred into the substrates.
REFERENCES:
patent: 6139626 (2000-10-01), Norris et al.
Warrier, M. et al., “Photocatalytic Reduction of Aromatic Azides to Amines Using CdS and CdSe Nanoparticles”, Photochem. Photobiol. Sci., 2004, 3, pp. 859-863.
Warrier, M. et al., Supporting Information “Photocatalytic Reduction of Aromatic Azides to Amines Using CdS and CdSe Nanoparticles”, reprinted from website http://www.rsc.org/suppdata/pp/b4/b404268a, printed Jul. 25, 2006, 13 pages.
Egger, S. et al., “Dynamic Shadow Mask Technique: A Universal Tool for Nanoscience”, Nano Letters vol. 5, No. 1 (2005), pp. 15-20.
Radhakrishnan, C. et al., “Photocatalytic Reduction of an Azide-Terminated Self-Assembled Monolayer Using CdS Quantum Dots”, Langmuir, vol. 22, No. 11 (2006), pp. 5018-5024.
Micro)n Technology, Inc.
Novacek Christy L
Smith Zandra
Wells St. John P.S.
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