Methods of patterning insulating layers using etching...

Details Methods of patterning insulating layers using etching... Methods of patterning insulating layers using etching...

2007-09-26

2011-11-15

Graybill, David (Department: 2894)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S734000, C438S735000

Reexamination Certificate

active

08058176

ABSTRACT:
Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second openings of different size therein, on the electrically insulating layer. First and second portions of the electrically insulating layer extending opposite the first and second openings, respectively, are simultaneously etched at first and second different etch rates. This etching yields a first trench extending adjacent the first opening that is deeper than a second trench extending adjacent the second opening. Then, the bottoms of the first and second trenches are simultaneously etched to substantially the same depths using an etching process that compensates for the first and second different etch rates.

REFERENCES:
patent: 6486070 (2002-11-01), Ho et al.
patent: 6531402 (2003-03-01), Nakagawa
patent: 6760529 (2004-07-01), Chong et al.
patent: 7105098 (2006-09-01), Shul et al.
patent: 7307025 (2007-12-01), Worsham et al.
patent: 7789991 (2010-09-01), Worsham et al.
patent: 2001/0046781 (2001-11-01), Nakagawa
patent: 2003/0108319 (2003-06-01), Chong et al.
patent: 2003/0171000 (2003-09-01), Chung et al.
patent: 2005/0003676 (2005-01-01), Ho et al.
patent: 2005/0287815 (2005-12-01), Lai et al.
patent: 2008/0188083 (2008-08-01), Jeon et al.
patent: 2008/0296736 (2008-12-01), Fu et al.
patent: 2009/0068767 (2009-03-01), Sirard et al.
patent: 2009/0081873 (2009-03-01), Park et al.
patent: 2010/0243605 (2010-09-01), Nishizuka
patent: 2000-091308 (2000-03-01), None
patent: 2004-071731 (2004-03-01), None
patent: 10-2005-0009799 (2005-01-01), None

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