Methods of manufacturing non-volatile memory devices

Details Methods of manufacturing non-volatile memory devices Methods of manufacturing non-volatile memory devices

2011-03-29

2011-03-29

Lee, Cheung (Department: 2812)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S218000, C438S221000, C438S257000, C257SE21540, C257SE21546

Reexamination Certificate

active

07915138

ABSTRACT:
In a method of manufacturing a non-volatile memory device, a conductive structure is formed on a substrate. The conductive structure includes a tunnel oxide pattern, a first conductive pattern, a pad oxide pattern and a hard mask pattern. A trench is formed on the substrate using the conductive structure as an etching mask. An inner oxide layer is formed on an inner wall of the trench and sidewalls of the tunnel oxide pattern and the first conductive pattern. The inner oxide layer is cured, thereby forming a silicon nitride layer on the inner oxide layer. A device isolation pattern is formed in the trench, and the hard mask pattern and the pad oxide pattern are removed from the substrate. A dielectric layer and a second conductive pattern are formed on the substrate. Accordingly, the silicon nitride layer prevents hydrogen (H) atoms from leaking into the device isolation pattern.

REFERENCES:
patent: 6548374 (2003-04-01), Chung
patent: 2002/0197823 (2002-12-01), Yoo et al.
patent: 2006/0240619 (2006-10-01), Ozawa et al.
patent: 10-2005-0012005 (2005-01-01), None
patent: 10-2005-0063266 (2005-06-01), None
patent: 2006-0078858 (2006-07-01), None

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