Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-02-07
2001-10-02
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000, C438S622000, C438S631000
Reexamination Certificate
active
06297150
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technical field pertaining to semiconductor devices, and particularly to a semiconductor device having an insulating film with voids, and a semiconductor device manufacturing method characterized by a step of forming an insulating film having voids.
2. Description of the Related Art
A high-integration design has been required to be established for semiconductor devices, particularly LSI devices, and in order to satisfy this requirement, it is needed that wires to be connected to electronic circuit elements in the semiconductor device are designed in a microstructure, the intervals between respective wiring layers in a multi-layer wiring structure are reduced as much as possible and also the intervals between adjacent wires are reduced in the same wiring layer.
However, the microstructure design of wires reduces the distance between the wires, so that the capacitance between the wires is increased. Therefore, the transmission speed of signals to be transmitted through the wires is lowered, and thus the operation speed of the semiconductor device is lowered.
In order to avoid the above problems, it is necessary to suppress the increase of the capacitance caused by reducing the distance between wires. For this purpose, a method of lowering the dielectric constant of the insulating film located between wires has been utilized. In order to lower the dielectric constant of the insulting film, a method of forming voids (pores) in the insulating film has been proposed.
The following process may be used to form the voids in the insulating film. That is, an insulating film in which minute elusive portions made of a material having a relatively large etching selection ratio are dispersed into a base material having a relatively small etching selection ratio is formed, and then the overall surface of the insulating film is etched to remove the elusive portions and form the voids (pores). However, the etching process of this method could not bring an excellent effect if the elusive portions are adjacent to one another. Therefore, it is required to increase the occupation ratio of the elusive portions in the insulating film. However, this structure makes it difficult to obtain an insulating film having high strength. Further, it is impossible in this method to set the size, arrangement, etc. of the voids in a desirable style.
In another method of forming the voids in the insulating film, when the insulating film is deposited and formed by the CVD method or the like, voids are left on recess portions on the wire pattern forming surface serving as a base layer (Japanese Laid-open Patent Application No. Sho-62-188230, Japanese Laid-open Patent Application No. Hei-2-86146). However, according to this method, the voids can be formed only when a desired relationship is established among the distance between the adjacent wires, the film thickness of the wiring layer, the deposition condition of the insulating film, etc., and also it is difficult to set the size of the voids to a desired value. In addition, no void can be formed above the wires, and thus this method has no sufficient effect on the reduction of the capacitance between wires belonging to different wiring layers in the multi-layer wiring structure.
There is known another method of forming the voids in the insulating film (Japanese Laid-open Patent Application No. Hei-4-207055). According to this method, an insulating film is composed of a plurality of insulating layers. First, an intermediate insulating layer is formed on a lower insulating layer, windows are formed in the intermediate layer, and then the lower insulating layer is wet-etched through the windows to form pores between adjacent wires. Thereafter, an upper insulating layer is deposited and formed on the intermediate insulating layer, and the windows of the intermediate insulating layer are closed by utilizing the overhang based on the formation of the upper insulating layer, thereby forming voids between the adjacent wires. However, with this method, the material of the upper insulating layer invades into the pores between the adjacent wires through the windows during the period from the time when the deposition of the upper insulating layer is started until the time when the overhang of the upper insulating layer is formed on the windows of the intermediate insulating layer to close the windows by the overhang, whereby the material of the upper insulating layer is deposited on the substrate. Therefore, the voids formed between the adjacent wires are shallow in depth, and thus the effect of reducing the capacitance between the wires is lowered.
SUMMARY OF THE INVENTION
The present invention has been implemented in view of the foregoing problems, and has an object to provide a method of manufacturing a semiconductor device having an insulating film such as an inter-wiring-layer insulating film with pores, which can easily set the shape, dimension and position of pores to be formed, and form an interlayer insulating film having high strength.
Further, the present invention has another object to provide a semiconductor device having an insulating film which has pores and exhibits an excellent dielectric constant reducing effect.
Still further, the present invention has other object to provide a semiconductor device having an insulating film which has pores, but has high strength.
In order to attain the above objects, according to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device having an insulating film formed on a wiring layer, wherein the insulating film is formed by a process comprising the steps of: forming a lower insulating layer; forming on the lower insulating layer an upper insulating layer having higher fluidity to a heating treatment than the lower insulating layer; forming pores each extending from the upper insulating layer to the lower insulating layer; and then performing the heat treatment to fluidize the upper insulating layer and cover the portions of the pores in the upper insulating layer with the fluidized upper insulating layer, thereby leaving the portions of the pores in the lower insulating layer as voids.
The upper insulating layer may be formed of BPSG, BSG or PSG.
The insulating film may contain a first additional insulating layer on the upper insulating layer, the first additional insulating layer having lower fluidity to the heat treatment than the upper insulating layer, the pores being formed so as to penetrate through the first additional insulating layer. The upper surface of the first additional insulating layer may be flattened prior to the formation of the pores.
The insulating film may contain a second additional insulating layer on the first additional insulating layer, and the second additional insulating layer may be formed after the heat treatment so as to have projecting portions extending into portions of the pores in the first additional insulating layer. The second additional insulting layer may be formed so as to have minute voids in the projecting portions. The upper surface of the second additional insulating layer may be flattened.
The pores may be formed in a wiring pattern area of the wiring layer and/or the area between adjacent wiring patterns of the wiring layer.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device having an insulating film formed on a wiring layer, wherein the insulating film is formed by a process comprising the steps of: forming a lower insulating layer; forming on the lower insulating layer an upper insulating layer having a lower etching rate than the lower insulating layer; forming pores each extending from the upper insulating layer to the lower insulating layer; performing an etching treatment to enlarge the portions of the pores in the lower insulating layer; and then performing a heat treatment to fluidize the upper insulating layer and cover the portions of the pores in the upper
Bowers Charles
Hutchins, Wheeler & Dittmar
NEC Corporation
Smoot Stephen W.
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