Methods of making relaxed silicon-germanium on insulator via...

Details Methods of making relaxed silicon-germanium on insulator via... Methods of making relaxed silicon-germanium on insulator via...

2003-09-19

2004-07-27

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

C438S458000

Reexamination Certificate

active

06767802

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to methods of forming thin films and, more particularly, to methods of forming strained Si—Ge films or strained silicon films.
In strained Si films, the carrier transport properties are enhanced by biaxial tensile strain. Strained Si films may be formed by epitaxially depositing silicon on relaxed SiGe. Strained Si MOSFETs have been demonstrated using SiGe-on-insulator (SGOI) substrates. Strained silicon on SGOI substrates combine the high mobility of strained silicon with the advantages of an SOI-type structure in sub-100 nm devices.
Methods of fabricating SGOI substrates have been reported. A thick layer of SiGe is deposited on a silicon wafer, and includes a graded SiGe buffer layer and a relaxed SiGe layer with constant Ge concentration. The thick SiGe layer is then planarized using CMP. Hydrogen is then implanted into the SiGe layer to produce a defect zone, which is also referred to as a microcavity zone, for wafer splitting purposes. The surface of SiGe layer on the silicon wafer is then bonded to the surface of a silicon oxide layer on a second silicon wafer, using direct wafer bonding. A thermal anneal is then used to split the SiGe layer at the defect zone formed by the hydrogen implantation by inducing microcracks parallel to the bonding interface. The second silicon wafer now comprises a silicon substrate with an insulting silicon oxide layer and a strained SiGe layer, which corresponds to a SGOI substrate. Further polishing of the SiGe layer may be necessary to remove surface roughness caused by the remaining portion of the defect zone.
A method of producing a SiGe-free strained silicon film has also been described. This technique is similar to the methods above, with the additional steps of depositing a layer of epitaxial silicon on relaxed SiGe before hydrogen implanting and wafer bonding. After wafer bonding and splitting, the SiGe layer is removed leaving a layer of strained Si on a silicon oxide surface.
The above techniques all involve thicker SiGe layers than desired, and may require one or two elaborate CMP processes.
SUMMARY OF THE INVENTION
Accordingly, methods of forming a SiGe layer on an insulator are provided, in connection with methods of forming strained silicon films employing SiGe layers to induce strain. For example, a SiGe layer is formed on an insulator by providing a substrate, and depositing a layer of SiGe over the substrate. A defect region is then formed in the SiGe layer by ion implantation. The SiGe layer has a surface that is suitable for bonding to a surface of an insulator formed on a second substrate. Prior to bonding, however, the SiGe layer is patterned and etched to produce SiGe regions that are partially isolated from each other. This partial isolation is provided to reduce damage, such as flaking and blistering, that may be caused by subsequent annealing processes. The two substrates bonded together form a couplet. This couplet is then split along the defect region formed in the SiGe layer by annealing the couplet. The resulting structure has SiGe regions over an insulator on the second substrate. The substrate originally provided is no longer needed. Since the SiGe regions will preferably have been strained when formed, the splitting anneal and subsequent annealing will relax the SiGe regions.
If desired, silicon may be epitaxially formed over these relaxed SiGe regions, whereby the resulting silicon will be strained silicon. This would produce a structure comprising strained silicon over a relaxed SiGe layer over an insulator.
In another embodiment, a silicon layer is formed over the SiGe layer before transfer to the second substrate. A defect region is formed in the SiGe layer by implanting ions. The silicon layer and the SiGe layer are both patterned, and then the silicon layer is bonded to the insulator overlying the second substrate. As the SiGe layer is relaxed during the splitting anneal and any subsequent relaxation annealing steps, the relaxation of the SiGe layer should induce a strain in the silicon layer. Once the remaining SiGe layer is removed, a strained silicon over insulator structure should remain.


REFERENCES:
patent: 6524935 (2003-02-01), Canaperi et al.
patent: 2001/0007790 (2001-07-01), Henley et al.
patent: 2002/0096717 (2002-07-01), Chu et al.
patent: 2003/0124815 (2003-07-01), Henley et al.
patent: 2003/0199126 (2003-10-01), Chu et al.

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