Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-08-02
2003-06-24
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S431000, C438S436000, C438S438000
Reexamination Certificate
active
06583028
ABSTRACT:
TECHNICAL FIELD
This invention relates to methods of forming trench isolation regions in semiconductive substrates.
BACKGROUND OF THE INVENTION
In modern semiconductor device applications, numerous devices are packed onto a single small area of a semiconductor substrate to create an integrated circuit. For the circuit to function, many of these individual devices may need to be electrically isolated from one another. Accordingly, electrical isolation is an important and integral part of semiconductor device design for preventing the unwanted electrical coupling between adjacent components and devices.
As the size of integrated circuits is reduced, the devices that make up the circuits must be positioned closer together in order to comply with the limited space available on a typical semiconductor substrate. As the industry strives towards a greater density of active components per unit area of semiconductor substrate, effective isolation between circuits becomes all the more important.
The conventional method of isolating circuit components in modern integrated circuit technology takes the form of trench isolation regions etched into a semiconductor substrate. Trench isolation regions are commonly divided into three categories: shallow trenches (STI) (trenches less than about 1 micron deep); moderate depth trenches (trenches of from about 1 to about 3 microns deep); and deep trenches (trenches greater than about 3 microns deep). Once the trench isolation regions are etched in the semiconductor substrate, a dielectric material is deposited to fill the trenches. As the density of components on the semiconductor substrate increased, the widths of the trenches decreased until the process of flowing dielectric material into the trenches developed problems.
Trench isolation regions, particularly STI regions, can develop undesirable voids in the dielectric material during the process to fill the trenches. As the dielectric material flows to an edge between a substrate surface and a sidewall of the trench, constrictions develop at the top of trenches due to the narrow opening in the trench. As the dielectric material flows into the trench, the constrictions can develop into voids moving into the trench with the dielectric material. Voids lower the dielectric characteristics of the dielectric material used and introduce structural instabilities in subsequent processes. Accordingly, voids in the dielectric material filling an isolation trench region are highly undesirable.
SUMMARY OF THE INVENTION
In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and then at least some of the silanol is converted to a compound comprising at least one of SiO
n
and RSiO
n
, where R comprises an organic group. An electrically insulative material is formed over the converted silanol to fill the trench.
In another aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A first layer of at least one of Si(OH)
x
and (CH
3
)
y
Si(OH)
4−y
is formed to partially fill the trench. At least some of the Si(OH)
x
if present is converted to SiO
2
and at least some of (CH
3
)
y
Si(OH)
4−y
if present is converted to (CH
3
)
x
SiO
2-x
. Next, a layer of an electrically insulative material is formed to fill the trench.
In yet another aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. The trench has sidewalls comprising silicon and a base comprising silicon. A first electrically insulative layer is formed over the sidewalls and base. The first electrically insulative layer is anisotropically etched to expose silicon of the base while leaving silicon of the sidewalls covered. A second electrically insulative layer is substantially selectively chemical vapor deposited over the exposed trench base. A third electrically insulative layer is formed over the first and second insulative layers to within the trench.
In still another aspect of the invention, a method of forming a trench isolation region includes forming a trench having sidewalls within a substrate. The sidewalls are thermally oxidized in an oxidizing environment which includes oxygen and hydrogen with a greater molar concentration of hydrogen than oxygen. A layer of silanol is formed to within the trench and at least some of the silanol is converted to a compound of at least one of SiO
n
and RSiO
n
, where R includes an organic group.
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Doan Trung Tri
Sandhu Gurtej S.
Blum David S
Jr. Carl Whitehead
Micro)n Technology, Inc.
Wells St. John P.S.
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