Methods of forming trench-based isolation regions with reduced s

Details Methods of forming trench-based isolation regions with reduced s Methods of forming trench-based isolation regions with reduced s

1997-04-15

1999-03-23

Fourson, George

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438444, 438426, H01L 2176

Patent

active

058858830

ABSTRACT:
Methods of forming trench-based isolation regions with reduced susceptibility to edge defects include the steps of forming trenches at a face of a semiconductor substrate and then filling the trenches with electrically insulating regions. However, to prevent exposure of those portions of the substrate extending adjacent the trenches, supplemental oxide regions are formed at the interfaces between the upper portions of the trench sidewalls and the electrically insulating regions in the trenches, by exposing the electrically insulating regions to an oxidation atmosphere at a temperature in a range between about 950.degree. C. and 1100.degree. C. In particular, the supplemental oxide regions are formed as thermal oxides of higher density than the electrically insulating regions in the trenches. Thus, the supplemental oxide regions are more resistant to chemical etchants. Accordingly, when the electrically insulating regions are planarized and etched during back end processing steps, the supplemental oxide regions will not be entirely etched and, therefore, those portions of the substrate (i.e., active regions) extending adjacent the trenches will not be exposed.

REFERENCES:
patent: 4636281 (1987-01-01), Buiguez et al.
patent: 5679599 (1997-10-01), Mehta
patent: 5712502 (1998-01-01), Park et al.
Wolf, S., "Silicon Processing for the VLSI Era:vol. 2, Process Technology", Lattice Press, pp. 23-28 1990.

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