Methods of forming thin-film transistor display devices

Details Methods of forming thin-film transistor display devices Methods of forming thin-film transistor display devices

2001-01-26

2002-05-07

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Making emissive array

Reexamination Certificate

active

06383831

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to display devices and methods of fabrication, and more particularly to liquid crystal display devices and methods of fabricating liquid crystal display devices.
BACKGROUND OF THE INVENTION
In order to minimize the space required by display devices, research into the development of various flat panel display devices such as LCD display devices, plasma display panels (PDP) and electro-luminescence displays (EL), has been undertaken to displace larger cathode-ray tube displays (CRT) as the most commonly used display devices. Particularly, in the case of LCD display devices, liquid crystal technology has been explored because the optical characteristics of liquid crystal material can be controlled in response to changes in electric fields applied thereto.
At present, the dominant methods for fabricating liquid crystal display devices (LCD) and panels are methods based on amorphous silicon (a-Si) thin film transistor (TFT) technologies. Using these technologies, high quality image displays of substantial size can be fabricated using low temperature processes. As will be understood by those skilled in the art, conventional LCD devices typically include a transparent (e.g., glass) substrate with an array of thin film transistors thereon, pixel electrodes, orthogonal gate and data lines, a color filter substrate and liquid crystal material between the transparent substrate and color filter substrate. The use of a-Si TFT technology typically also requires the use of separate peripheral integrated circuitry to drive the gates and sources (i.e., data inputs) of the TFTs in the array. Therefore, there is typically provided a large number of pads for connecting the gate lines (which are coupled to the gates of the TFTs) and data lines (which are coupled to the sources of the TFTs) to the peripheral drive circuitry.
FIG. 1
is a diagram illustrating a schematic layout of a conventional LCD display device. Here, plurality of gate lines
3
and plurality of data lines
7
are arranged in a substrate
1
in a matrix format. A plurality of gate pads
5
and a plurality of data pads
9
are also provided at ends of the gate lines
5
and the data lines
7
, respectively. A portion of the device enclosed by one gate line
3
and one data line
7
typically forms a pixel
11
. In addition,
FIG. 2
is a flowchart illustrating five steps of a conventional method of forming a TFT-LCD-display device, and
FIGS. 3-5
are sectional views illustrating a TFT-LCD manufactured by the conventional method of FIG.
2
.
A conventional method for manufacturing a TFT-LCD display device will now be described with reference to
FIGS. 2-5
. First, a first metal layer, having a stacked structure including chromium (Cr) and an aluminum (Al) alloy, is formed on a transparent glass substrate
100
to a predetermined thickness. Then, the first metal layer is etched by a first photolithography process to form a gate electrode
10
and a gate line
10
′ on a TFT portion and gate pad portion of the substrate
100
(step
101
). Then, a layer (e.g., nitride layer) is deposited on the-entire surface of the substrate having the gate electrode
10
and the gate line
10
′ thereon to form a gate insulation layer
12
. An amorphous silicon layer and an impurity-doped amorphous silicon layer are then sequentially deposited on the gate insulation layer
12
to form an amorphous semiconductor layer. Next, the amorphous semiconductor layer is patterned by a second photolithography process, resulting in a semiconductor layer pattern
14
on the TFT portion of the substrate
100
(step
102
).
Then, a second metal layer such as Cr is deposited on the entire surface of the insulation layer
12
and on the amorphous semiconductor layer pattern
14
to a predetermined thickness. The second metal layer is then patterned by a third photolithography process to form a data line
16
a
and a source/drain electrode
16
b
on the TFT portion of the substrate, a gate pad
16
c
on the gate pad portion of the substrate, and a data pad
16
d
on a data pad portion of the substrate (step
103
), as illustrated by
FIGS. 3-5
, respectively.
A passivation layer
18
is then formed on the entire surface of the above structure to a predetermined thickness. The passivation layer
18
is then patterned to expose parts of the drain electrode
16
b,
the gate line
10
′ and data pad
16
d
using a fourth photolithography process (step
104
). After forming an indium-tin-oxide (ITO) layer as a transparent conductive layer on the entire surface of the structure having the passivation layer pattern
18
thereon, the ITO layer is patterned by a fifth photolithography process to form a pixel electrode
20
(step
105
).
Unfortunately, the use of chromium (Cr) as the second metal layer may not be preferred as a data line material because it typically has a relatively high resistivity. This relatively high resistivity can lead to an increased RC delay associated with the data line and can reduce the maximum viewing angle of the display. The use of chromium as the second metal layer may also be limited by the frequency of formation of metal line discontinuities during processing which can reduce device yield. Also, the use of aluminum (Al) or an alloy thereof may not be preferred because contact formation between aluminum based alloys and indium-tin-oxide (ITO) layers typically results in the formation of aluminum oxide clusters. These oxide clusters typically act as electrical insulators and increase contact resistance. As will be understood by those skilled in the art, these insulating clusters are typically formed when current passes through the aluminum/ITO contacts and causes aluminum atoms to migrate into the ITO. This parasitic phenomenon is typically referred to as “metal migration”.
Thus, notwithstanding the above described method of forming TFT-LCD devices, there continues to be a need for improved methods of forming TFT-LCD display devices.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved thin-film transistor display devices and methods of forming same.
It is another object of the present invention to provide thin-film transistor display devices which are less susceptible to parasitic metal migration, and methods of forming same.
It is still another object of the present invention to provide thin-film transistor display devices having improved electrode and display characteristics, and methods of forming same.
These and other objects, features and advantages of the present invention are provided by thin-film transistor display devices having improved composite electrodes which provide, among other things, low resistance contacts and paths for electrical signals and are less susceptible to parasitic metal migration which can limit display quality and lifetime, and methods of forming same. In particular, a thin-film transistor (TFT) display device is provided having an insulated gate electrode on a face of a substrate (e.g., transparent substrate) and a semiconductor layer on the insulated gate electrode, opposite the face of the substrate. Spaced apart source and drain electrodes are also provided on the semiconductor layer. These source and drain electrodes each preferably comprise a composite of at least two layers containing respective metals therein of different element type. Preferably, one of the layers comprises a metal which is capable of forming a low resistance contact with electrodes such as a pixel electrode (e.g., transparent indium-tin-oxide electrode) and the other of the layers comprises a relatively low resistance metal so that the overall effective resistance of each composite electrode is maintained at a low level.
According to one preferred embodiment of the present invention, an insulated gate electrode is provided which contains a composite gate electrode on a face of a substrate and a gate insulating layer on the composite gate electrode. Here, the composite gate electrode preferably comprises a first gate layer c

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