Methods of forming SRAM cells having landing pad in contact...

Details Methods of forming SRAM cells having landing pad in contact... Methods of forming SRAM cells having landing pad in contact...

2007-10-02

2007-10-02

Doan, Theresa (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S154000, C438S155000

Reexamination Certificate

active

11589618

ABSTRACT:
SRAM cells having landing pads in contact with upper and lower cell gate patterns, and methods of forming the same are provided. The SRAM cells and the methods remove the influence resulting from structural characteristics of the SRAM cells having vertically stacked upper and lower gate patterns, for stably connecting the patterns on the overall surface of the semiconductor substrate. An isolation layer isolating at least one lower active region is formed in a semiconductor substrate of the cell array region. The lower active region has two lower cell gate patterns. A body pattern is disposed in parallel with the semiconductor substrate. The body pattern is formed to confine an upper active region, which has upper cell gate patterns on the lower cell gate patterns. A landing pad is disposed between the lower cell gate patterns. A node pattern is formed to simultaneously contact the upper cell gate pattern and the lower cell gate pattern.

REFERENCES:
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patent: 5492851 (1996-02-01), Ryou
patent: 5612552 (1997-03-01), Owens
patent: 5926700 (1999-07-01), Gardner et al.
patent: 6429484 (2002-08-01), Yu
patent: 1020020096743 (2002-12-01), None
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patent: 2000-114453 (2000-04-01), None
Office Action from Korean Patent Office for Korean Patent Application No. 10-2004-0090608 mailed May 25, 2006.

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