Methods of forming shallow trench isolation regions using plasma

Details Methods of forming shallow trench isolation regions using plasma Methods of forming shallow trench isolation regions using plasma

1997-10-14

2000-06-06

Cain, Edward J.

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438427, 438435, 438437, H01L 2176

Patent

active

060717920

ABSTRACT:
Methods of forming trench isolation regions include the steps of forming a trench in a semiconductor substrate having a surface thereon and then depositing an electrically insulating layer on the semiconductor substrate, to fill the trench. This depositing step is preferably performed by depositing an electrically insulating layer (e.g., SiO.sub.2) using a plasma chemical vapor. A mask layer is then formed on the electrically insulating layer. According to a preferred aspect of the present invention, the mask layer is planarized using chemical mechanical polishing, for example, to define a mask having openings therein that expose first portions of the electrically insulating layer extending opposite the surface. These first portions are also self-aligned to and extend opposite active portions of the substrate. The exposed portions of the electrically insulating layer are then etched using the mask as an etching mask. Then, the mask and second portions of the electrically insulating layer extending opposite the mask, are etched in sequence to define an electrically insulating region in the trench. This latter etching step is preferably not performed using a chemical mechanical polishing step to limit the likelihood of isolation deterioration caused by the dishing phenomenon.

REFERENCES:
patent: 5940716 (1999-08-01), Jin et al.

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