Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2002-01-30
2003-11-25
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S074000, C438S488000
Reexamination Certificate
active
06653165
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to methods of forming a semiconductor element, and semiconductor elements. The semiconductor element forming methods of the present invention are suitably applicable, particularly, as methods of forming photoelectric conversion elements such as solar cells and the like.
2. Related Background Art
High-frequency plasma CVD processes have the advantages of facilitating increase of area and formation at low temperatures and increasing process throughput and are thus one of predominant means as methods of forming silicon-based thin films.
Let us consider solar cells as an example of semiconductor elements having a semiconductor junction consisting of silicon-based thin films. As compared with existing energy utilizing fossil fuels, the solar cells using the silicon-based thin films have the advantages of inexhaustible energy sources and clean power generation processes, but it is necessary to further decrease the unit cost per generated power, in order to make them widespread. Technological subjects significant for that purpose involve establishment of production techniques for implementing lower cost, establishment of techniques for increasing the photoelectric conversion efficiency, establishment of techniques concerning evenness for forming semiconductor elements with desired characteristics on a stable basis, and establishment of techniques for enhancing the environment resistance in consideration of practical operating conditions that the solar cells are often installed outdoors.
The known methods of producing the semiconductor elements having the semiconductor junction consisting of the silicon-based thin films include a method of sequentially forming semiconductor layers of desired conductivity types in a single semiconductor forming chamber, a method called a batch type in which a p-layer, an i-layer, and an n-layer are formed in their respective, independent semiconductor forming chambers, so as to be capable of preventing mixture of impurity gas, and so on.
As a method of preventing the mixture of impurity and substantiating much lower cost, U.S. Pat. No. 4,400,409 discloses the continuous plasma CVD process employing the Roll to Roll system. In this method, a substrate is conveyed so as to pass through a plurality of glow discharge regions, which are installed through gas gates mounted in between to prevent incorporation of an impurity gas, whereby semiconductor layers of desired conductivity types can be sequentially formed. The Roll to Roll system involves a step of conveying the substrate while unwinding the substrate from a roll and winding up the substrate onto another roll.
The high-frequency plasma CVD processes having been proposed heretofore are excellent as semiconductor element forming methods, but the number of necessary semiconductor forming chambers increases where the semiconductor element includes a plurality of pin junctions or where the p-layer, the i-layer, and/or the n-layer is of a multilayer structure. Let us suppose herein that in the semiconductor element forming steps, all the semiconductor forming chambers are coupled through a gas gate or directly so as to form the semiconductor layers continuously. In this configuration, the entire system has to be stopped every time part of the semiconductor forming chambers require maintenance, inspection, repair, and so on. In the forming method including continuous discharge over long periods, there occurs time dependence of characteristics due to change in heat or degassing amount or the like during the long-period discharge, which will result in posing the problem of causing dispersion in the characteristics of the semiconductor element.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor element forming method capable of efficiently forming a semiconductor element having a stack configuration of a number of silicon-based thin films, and a method of forming a semiconductor element with better evenness and characteristics, and also provide semiconductor elements with excellent adhesion, environment resistance, and so on.
The present invention provides a method of forming a semiconductor element comprising a step of forming a plurality of pin junctions comprised of a silicon-based material on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure, the method comprising a step of forming a p-layer (p-type semiconductor layer), an i-layer (i-type semiconductor layer), and a portion of an n-layer (n-type semiconductor layer) of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing the p-layer or the n-layer exposed in the surface, to an oxygen-containing atmosphere; a step of forming on the p-layer or the n-layer as exposed to the oxygen-containing atmosphere a layer of the same conductivity type as that of the p-layer or the n-layer, thereby completing the first pin junction; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface.
In a preferred embodiment of the present invention, during formation of a layer (a p-layer or an n-layer) formed last of a certain pin junction, the layer (the p-layer or the n-layer) being formed is exposed to an oxygen-containing atmosphere, thereafter a p-layer or an n-layer (a layer of the same conductivity type as that of the layer having been exposed to the oxygen atmosphere) is again formed on the p-layer or the n-layer having been exposed to the oxygen-containing atmosphere to complete one pin junction, and then a layer (an n-layer or a p-layer: a layer of a conductivity type opposite to that of the layer having been exposed to the oxygen atmosphere) to be first formed in an adjacent pin junction is formed.
More specific methods of the present invention include (1) a semiconductor element forming method comprising a step of forming a p-type layer, a step of forming an i-type layer thereon, a step of forming an n-type layer thereon, a step of exposing the n-type layer to an oxygen atmosphere, a step of forming an n-type layer on the n-type layer having been exposed to the oxygen atmosphere (these steps heretofore form a first pin junction), and a step of sequentially forming a p-type layer, an i-type layer, and an n-type layer on the n-type layer; (2) a semiconductor element forming method comprising a step of forming an n-type layer, a step of forming an i-type layer thereon, a step of forming a p-type layer thereon, a step of exposing the p-type layer to an oxygen atmosphere, a step of forming a p-type layer on the p-type layer having been exposed to the oxygen atmosphere (these steps heretofore form a first pin junction), and a step of sequentially forming an n-type layer, an i-type layer, and a p-type layer on the said p-type layer; and so on.
In the present invention, a dopant concentration of the n-layer or the p-layer formed immediately before the step of exposure to the oxygen-containing atmosphere is preferably made smaller than a dopant concentration of the n-layer or the p-layer formed immediately after the step of exposure to the oxygen-containing atmosphere.
In the present invention, a partial pressure of oxygen in the oxygen-containing atmosphere is preferably not less than 1 Pa. The oxygen-containing atmosphere may be the atmosphere.
In the present invention, it is preferable that the i-layer of one of the first pin junction and the second pin junction is amorphous and the i-layer of the other one comprises a crystal phase. A preferred example of this embodiment is a method wherein, at a stage when a portion of a layer to be formed last (a p-layer or an n-layer) of a pin junction having an amorphous i-layer is formed, it (the layer being formed) is exposed to an oxygen-containing atmosphere and thereafter a p-layer or a n-layer (a layer of the same conductivity type as that of the layer having been
Hori Tadashi
Koda Yuzo
Kondo Takaharu
Matsuda Koichi
Sakai Akira
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Mulpuri Savitri
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