Methods of forming memory cell capacitor plates in memory...

Details Methods of forming memory cell capacitor plates in memory... Methods of forming memory cell capacitor plates in memory...

1999-03-31

2001-07-31

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

C438S003000, C438S240000

Reexamination Certificate

active

06268260

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to semiconductor devices and more particularly, to improved methods of forming memory cell capacitor plates from materials that do not form insulators upon exposure to oxygen. Materials with such properties might include oxygen-resistant materials, conductive materials that form conductive oxides upon exposure to oxygen, or the conductive oxides themselves for use in memory cell capacitor devices.
Semiconductor manufacturers must continually improve the power and performance of semiconductor devices while keeping the device size to a minimum. In an effort to maintain a small device size in the manufacture of integrated circuit devices such as memory cells and memory cell capacitor structures, most semiconductor manufacturers reduce individual components of the memory device to minimal dimensions. To accomplish that purpose, manufacturers are turning to different material alternatives having the desired characteristics that would reduce the device area consumed by the components. However, new problems arise as traditional manufacturing processes are applied to these new materials. For example, ferroelectric materials offer advantageous characteristics such as high dielectric constants, remnant polarization, and low coercive voltages, which make the use of these materials increasingly attractive in the semiconductor industry.
An illustrative example can be found in DRAM applications, where the high dielectric constants of ferroelectric materials allow for increased capacitance per cell volume. This translates into a DRAM cell size reduction by as much as a factor of 20 in comparison with DRAM cells presently in use that employ silicon nitride or silicon oxide dielectrics. Moreover, the remnant polarization allows for the storage of states, much like the storage of states in a magnetic domain of, for example, a ferromagnetic material. This polarization characteristic of ferroelectric materials permits information to be stored indefinitely as in magnetic materials, without the need to provide an applied field or voltage to maintain that memory. This makes ferroelectric materials an excellent material choice for manufacturing nonvolatile memory arrays. Furthermore, the low coercive voltages exhibited by ferroelectric materials advantageously allow these nonvolatile memory arrays to switch states, among other modes of operation, using standard supply voltages, for example, between about 3 and about 5 volts.
Ferroelectric materials generally require high processing temperatures to achieve the desired crystal structure that will provide the preferred characteristics, and the formation of the ferroelectric phase depends on the availability of oxygen. Therefore, ferroelectric materials are generally deposited in an oxygen-containing environment, which might result in incompatibility between ferroelectric materials and the conductive materials used within the same device. By way of example, a capacitor structure might have a capacitor storage element made of ferroelectric materials and capacitor plates made of a conductive metal. The oxygen present in the deposition environment of ferroelectrics may very well form an oxide with the conductive metal used to form capacitor plates. And since most oxides have an insulating effect, this would drastically impact the capacitor properties in a detrimental manner by cutting off electrical contact at the interface where the oxide is formed. The oxygen atmosphere processing of the ferroelectric film places stringent materials requirements on the capacitor plates, which generally should be made of materials that are substantially nonreactive with oxygen. Materials that could be used compatibly with ferroelectrics might include oxygen-resistant materials, conductive materials that form conductive oxides, or the conductive oxides themselves for use in memory cell capacitor devices. Examples of these materials might include, but are not limited to, platinum, ruthenium, ruthenium oxide, iridium, and iridium oxide. However, these unconventional materials do not lend themselves well to traditional plasma etching techniques.
By way of example, platinum is a relatively chemically inert material that does not respond very well to etching.
FIG. 1
depicts an etched platinum-containing layer
100
which illustrates the problems encountered in the etching of platinum. Platinum-containing layer
100
has been sputter etched to form the desired structure, often with a noble gas such as argon. The sputtering displaces some platinum ions, which tend not to land on the chamber walls, but instead, hit the sidewalls
102
and redeposit upon the platinum-containing layer
100
. Upon removal of a photoresist mask previously disposed over platinum-containing layer
100
, fang-like structures which are commonly termed as veils
104
are formed. These structures may also be referred to as redeposit, fences, crowns, and ears, among others. The prominence of veils
104
relates inversely with the tapering angle of platinum-containing layer
100
, that is, the more vertical the profile, the more prominent the veils. However, excessive taper angles that would avoid veil formation would also result in lower packing densities, which would be inefficient and therefore not be feasible in these applications.
There are many disadvantages with this particular aspect of platinum etching. Veils
104
, which protrude above the top surface of platinum-containing layer
100
, do not allow for a flat surface upon which subsequent layers may be deposited. Moreover, the fang-like structure of veils
104
provide sharp points on the structure, that are areas that could possibly generate very high electric fields even with extremely small voltages, which has a very high potential for breaking down. The preferred configuration would probably be a mesa structure that would have steep profile angles, i.e., more vertical profiles, to allow a more compact packing density, yet would have no sharp protrusions that might cause device failure.
Therefore, there are desired improved methods that allow for the manufacture of capacitor plates made from materials that do not react with oxygen to form insulators while avoiding the aforementioned problems associated with etching these materials.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and according to the purpose of the present invention, improved methods of forming memory cell capacitor plates and memory cell capacitor structures are disclosed. In one embodiment of the invention, a method of forming a memory cell capacitor plate is disclosed. This method begins with the deposition of a sacrificial layer followed by the forming of an opening in the sacrificial layer. Then an electrode material layer which includes a substantially conductive material that remains substantially conductive upon exposure to oxygen is deposited over a top surface of the sacrificial layer and at least partially filling the opening. The method continues with removing a portion of the electrode material layer down to at least about a level of the top surface of the sacrificial layer to define a top surface of the memory cell capacitor plate, followed by removal of the sacrificial layer.
In another embodiment of the present invention, a method of forming a platinum-containing memory cell capacitor plate is disclosed. The method begins with the deposition of a sacrificial layer, followed by the forming of an opening in the sacrificial layer. Then a platinum-containing layer is deposited over a top surface of the sacrificial layer and at least partially filling the opening. The method continues with the removal of a portion of the platinum-containing layer down to at least about a level of the top surface of the sacrificial layer to define a top surface of the platinum-containing memory cell capacitor plate, followed by the removal of the sacrificial layer.
In yet another embodiment of the present invention, a method of forming a memory cell capacitor structure is disclosed. The method begins with th

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