Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2000-12-08
2003-05-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S396000, C438S397000, C438S399000
Reexamination Certificate
active
06569746
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a capacitor of semiconductor integrated circuit and method for fabricating the same, and more particularly to a capacity of semiconductor integrated circuit having a structure of a metal insulator metal (MIM) type which is applied to a logic circuit or an analog circuit and a method for fabricating the same.
2. Description of Related Art
A conventional semiconductor integrated circuit is classified in response to a signal process mode as a digital type of integrated circuit (what is called a logic circuit) in which an output signal is changed to an on/off type by a variation of input signal and an analog type of integrated circuit (what is called an analog circuit) in which an output signal linearly varies with a variation of input signal.
Since the above-mentioned integrated circuits serve to memorize information in response to whether or not charge in capacitor is present without distinction between a digital type and an analog type, in order to maintain normal operation characteristic of the circuits, a capacitor must be fabricated lest its capacitance vary with the variation of temperature or voltage while its device is manufactured.
FIG. 1
shows a cross sectional view for illustrating a capacitor structure of a conventional logic circuit or analog circuit having a gate linear width of 0.5 &mgr;m which has been commonly applied when the integrated circuit is manufactured.
Referring to
FIG. 1
, in the conventional PIP-type capacitor of logic or analog circuit, field oxide layer (not shown) formed on the semiconductor substrate
10
is formed thereon with a lower electrode
12
made of polysillicon, on which dielectric layer
14
having an ON structure (for exaple, buffer oxide layer
14
a
itride layer
14
b
) is formed, and the dielectric layer
14
is formed thereon with an upper electrode
18
made of polycide and having a line width narrower than that of the lower electrode
12
.
However, in case the capacitor of a logic or analog circuit is formed in the PIP type structure mentioned in the above, the following problem is occured.
Since the PIP type capacitor shown in
FIG. 1
has the voltage coefficient of capacitance (VCC) of about 220 part per million/V (ppm) and temperature coefficient of capacitance (TCC) of about 120 ppm/C, there are problems in that a variation of the capacitance caused by a variation of voltage or temperature is increased, thereby a distribution variation of capacitance is increased as well as bad array matching characteristics appears.
Furthermore, in case the capacitor having capacitance characteristics mentioned in the above is used in a high frequency band, semiconductor integrated circuit cannot be normally operated in a stable state because resistance of polysilicon forming electrodes of capacitor is high.
To solve the problems, recently, there is a tendency to adapt the MIM structure instead of PIP structure to a capacitor when logic or analog circuit is designed. For example, as shown in
FIG. 2
, U.S. Pat. No. 5,406,447 discloses the MIM-type capacitor of the conventional logic or analog circuit.
Referring to
FIG. 2
, in the conventional MIM-type capacitor, a semiconductor substrate
20
is formed thereon with an isolation oxide film
22
, the isolation oxide film
22
is formed on its predetermined portion with a lower electrode
24
made of conductive material, the lower electrode
24
is formed on its predetermined portion with a dielectric film
28
made of oxide, where a first barrier metal film
26
is formed therebetween, an intermediate film
30
is formed on the respective films, the intermediate ioslation film
30
is formed therein with via holes so that the surface of the dielectric film
28
is exposed in its predetermined portion, and the intermediate film
30
is formed thereon with a second barrier metal film
32
which is formed thereon with an upper electrode
34
made of conductive material.
Such capacitor having a MIM-type structure can be more stably operated in a high frequency band than a PIP-type capacitor. In this case, however, the following problem is occured because it is difficult to monitor when etch is completted during the formation of via holes.
Since the intermediate isolation film
30
is commonly formed with about 10,000 Å in thickness, 30 to 40% of the thickness in the lower film is over-etched during the formation of the via holes. Accordingly, in case the MIM-type capacitor is manufactured so as to have the structure mentioned in the above, the dielectric film
28
is also partly etched when the intermediate isolation film
30
is etched. At this time, since it is difficult to detect how much the dielectric film
28
is over-etched and accordingly thickness of the dielectric film
28
cannot be revived in the same manner, there is a problem in that the VCC value and TCC value become increased due to the variation of capacitance.
In order to solve the problem, the capacitor must be manufactured so that the dielectric film is thicker than that of the conventional dielectric film, or a separate film which can be used as a dielectric film as well as etch-stopper is further formed on the dielectric film
28
, thereby the over-etch of the dielectric film
30
may be prevented during the etch of the intermediate isolation film
30
. However, in case the dielectric film becomes thicker, since the capacitance becomes decreased, there is a problem in that the chip size must be increased. In case the additional film is formed, there is a problem in that material which can be used as a dielectric film and etch-stopper has not yet been developed. Therefore, the two methods cannot be applied at present time.
In case VCC and TCC values become increased, bad characteristics of capacitor is caused thereby and bad operation of analog circuits is accordingly caused. In some cases, lowered bit resolution prevents high performance of analog circuits from being realized.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a capacitor of semiconductor integrated circuit in which a MIM structure is formed by utilizing metal which is stable in its conductivity characteristics, and a method for manufacturing the capactor which evaporation for dielectric film is performed in a state that via holes are formed, thereby characteristics of the capacitor is improved by increasing bit resolution, and as a result, the capacitor can be normally operated even in a high frequency band.
It is another object of the invention to provide a method for effectively manufacturing the capacitor of the semiconductor integrated circuit.
In order to achieve the above-mentioned object, in accordance with one embodiment of the present invention, there is provided a capacitor of a semiconductor integrated circuit comprising a lower electrode made of conductive material formed on a predetermined portion of insulating substrate; insulating layer formed on the insulating substrate including the lower electrode and provided with a via hole so that surface of the lower electrode is exposed in its predetermined portion; and a dielectric layer formed on the insulating layer and in the via hole; an upper electrode formed on a predetermined portion of the dielectric layer including the via hole and having a piled-up layer structure such as “conductive plug/conductive layer pattern”.
At this time, the capacitor may have a structure that anti-reflection layers are further formed on the lower electrode and upper electrode respectively, or that a metal barrier layer is further formed on the lower surface of the lower electrode and between the conductive plug of the upper electrode and the conductive layer pattern or on the lower surface of the conductive plug, or that the conductive plug connected to the lower electrode is further formed within the insulating substrate below the lower electrode.
In order to achieve the another object, the present invention provides a method for manufacturing a capacitor of a semiconductor integrated circuit, compris
Kim Dong-Woo
Lee Hyae-Ryoung
Yu Sun-Il
Berry Renee R
Myers Bigel & Sibley & Sajovec
Nelms David
Samsung Electronics Co,. Ltd.
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