Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-10-15
1998-10-13
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438255, H01L 2120
Patent
active
058211527
ABSTRACT:
A method of forming a hemispherical grained silicon electrode includes the steps of forming an amorphous silicon layer on an integrated circuit substrate, and heating the integrated circuit substrate and the amorphous silicon layer to a first deposition temperature. The amorphous silicon layer is exposed to a source gas including silicon while maintaining the first deposition temperature thereby forming silicon crystal nuclei on a surface of the amorphous silicon layer. The temperature of the integrated circuit substrate is lowered to a second deposition temperature wherein the second deposition temperature is less than the first deposition temperature. The silicon crystal nuclei are exposed to the source gas including silicon while maintaining the second deposition temperature thereby increasing a size of the silicon crystal nuclei. The silicon layer and the silicon crystal nuclei are then annealed thereby further increasing the size of the silicon crystal nuclei to provide hemispherical grains on the silicon layer.
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Han Chan-hee
Kim Jae-Wook
Park Young-kyou
Yang Chang-jip
Nguyen Tuan H.
Samsung Electronics Co,. Ltd.
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