Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
2006-06-06
2006-06-06
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C438S455000, C438S622000, C438S652000, C438S666000, C438S672000
Reexamination Certificate
active
07056813
ABSTRACT:
Various methods of forming backside connections on a wafer stack are disclosed. To form the backside connections, vias are formed in a first wafer that is to be bonded with a second wafer. The vias used for the backside connections are formed on a side of the first wafer along with an interconnect structure, and the backside connections are formed on an opposing side of the first wafer using these vias.
REFERENCES:
patent: 5102821 (1992-04-01), Moslehi
patent: 5373184 (1994-12-01), Moslehi
patent: 5413952 (1995-05-01), Pages et al.
patent: 5756395 (1998-05-01), Rostoker et al.
patent: 5849627 (1998-12-01), Linn et al.
patent: 5866469 (1999-02-01), Hays
patent: 5882532 (1999-03-01), Field et al.
patent: 6380629 (2002-04-01), Kim
patent: 6406636 (2002-06-01), Vaganov
patent: 2002/0001920 (2002-01-01), Takisawa et al.
patent: 2002/0076902 (2002-06-01), Guesic
patent: 2002/0160582 (2002-10-01), Chen et al.
patent: 2002/0195673 (2002-12-01), Chou et al.
patent: 2003/0060020 (2003-03-01), Walitzki et al.
patent: 2003/0157748 (2003-08-01), Kim et al.
Kobrinsky, et al., “Method and Structure For Interfacing Electronic Devices”, U.S. Appl. No. 10/334,172, Filed Dec. 28, 2002, 39 pgs.
Kim Sarah E.
List R. Scott
Morrow Patrick
Fourson George
Intel Corporation
Maldonado Julio J
Tweet Kerry D.
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