Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1996-10-15
1999-02-02
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438437, 438692, H01L 2176
Patent
active
058664661
ABSTRACT:
An isolation region is formed on a substrate by forming spaced apart mesas on the substrate, each mesa including a barrier region which caps the mesa. An insulation riser is then formed in the substrate, disposed between and separated from the spaced apart mesas. Spaced apart trenches are formed in the substrate on opposite sides of the insulation riser, each trench disposed between the insulation riser and a respective one of the mesas. An insulating material layer is formed on the substrate, the insulating material layer filling the spaced apart trenches and covering the insulation riser and the mesas, and then is chemical mechanical polished to expose the mesas and thereby form an isolation region spanning the spaced apart trenches. Preferably, barrier spacers are formed on sidewall portions of the mesas, and a surface portion of the substrate between the barrier regions is thermally oxidized using the barrier regions and the barrier spacers as an oxidation barrier to form the insulation riser. The isolation region includes an insulation riser at the surface of the substrate, extending from the surface into the substrate, and an insulation region on the substrate, covering the insulation riser and extending into the spaced apart trenches. The insulation region may include insulation spacers adjacent sidewall portions of the spaced apart trenches, and an insulation region on the substrate, covering the insulation riser and extending into the spaced apart trenches to contact the insulation spacers.
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Kim Chang-Gyu
Kim Jae-deok
Fourson George
Samsung Electronics Co,. Ltd.
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