Methods of fabricating metal wiring in semiconductor devices

Details Methods of fabricating metal wiring in semiconductor devices Methods of fabricating metal wiring in semiconductor devices

2007-11-27

2007-11-27

Tran, Long K. (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S637000, C438S640000, C257SE21585, C257SE23011

Reexamination Certificate

active

11264550

ABSTRACT:
Manufacturing costs may be reduced and yield may be improved when metal wiring in a semiconductor device is fabricated by a disclosed method including: sequentially forming an etch stop layer, an intermetal insulation layer, an anti-reflection coating layer, and a mask pattern on a semiconductor substrate formed with a lower structure; etching the anti-reflection coating layer using the mask pattern; forming a trench by removing the intermetal insulation layer to a predetermined depth by performing wet etching using the mask pattern; forming a via hole by removing the remaining intermetal insulation layer and the etch stop layer by dry etching them using the mask pattern; and removing the mask pattern.

REFERENCES:
patent: 6444588 (2002-09-01), Holscher et al.
patent: 6503829 (2003-01-01), Kim et al.
patent: 2002/0027254 (2002-03-01), Kwean
patent: 2005/0073053 (2005-04-01), Park

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