Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-02-13
2007-02-13
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE23010, C257SE23079
Reexamination Certificate
active
10299451
ABSTRACT:
Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications are used to fabricate two structures: (1) a first structure includes porous Si (silicon) regions extending throughout the thickness of an Si substrate that allows for the subsequent formation of metallized posts and metallized moats in the porous regions; and (2) a second structure includes staggered deep V-grooves or trenches etched into an Si substrate, or some other semiconductor substrate, from the front and/or the back of the substrate, wherein these V-grooves and trenches are filled or coated with metal to form the metallized moats.
REFERENCES:
patent: 4507849 (1985-04-01), Shinozaki
patent: 5166097 (1992-11-01), Tanielian
patent: 5200639 (1993-04-01), Ishizuka et al.
patent: 5508211 (1996-04-01), Yee et al.
patent: 5618752 (1997-04-01), Gaul
patent: 5644156 (1997-07-01), Suzuki et al.
patent: 5665633 (1997-09-01), Meyer
patent: 5767561 (1998-06-01), Frei et al.
patent: 5889314 (1999-03-01), Hirabayashi
patent: 6251739 (2001-06-01), Norstrom et al.
patent: 6261892 (2001-07-01), Swanson
patent: 6432724 (2002-08-01), Ahn et al.
patent: 6459134 (2002-10-01), Ohguro et al.
patent: 6670703 (2003-12-01), Ahn et al.
patent: 6852605 (2005-02-01), Ng et al.
patent: 6911348 (2005-06-01), Becker et al.
patent: 7071052 (2006-07-01), Yeo et al.
patent: 2001/0023111 (2001-09-01), Yuan
patent: 2002/0022362 (2002-02-01), Ahn et al.
patent: 2002/0155655 (2002-10-01), Pon
patent: 2004/0217440 (2004-11-01), Ng et al.
patent: 2005/0124131 (2005-06-01), Hweing et al.
patent: 0 932 204 (1999-07-01), None
Tu King-Ning
Xie Ya-Hong
Yeh Chang-Ching
Gates & Cooper LLP
Stevenson André
The Regents of the University of California
LandOfFree
Methods of fabricating highly conductive regions in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of fabricating highly conductive regions in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of fabricating highly conductive regions in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3870726