Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2006-09-19
2006-09-19
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S591000, C438S216000
Reexamination Certificate
active
07109104
ABSTRACT:
A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).
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patent: 6277722 (2001-08-01), Lee et al.
patent: 1997-017969 (1997-04-01), None
Heo Seong-Jun
Kim Sung-Man
Ku Ja-Hum
Lee Chang-Won
Youn Sun-Pil
Harness Dickey & Pierce
Lindsay Jr. Walter L.
Samsung Electronics Ltd., Co.
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