Electronic digital logic circuitry – Reliability – Redundant
Reexamination Certificate
2007-10-11
2009-11-17
Barnie, Rexford N (Department: 2819)
Electronic digital logic circuitry
Reliability
Redundant
C365S189120, C365S200000
Reexamination Certificate
active
07619438
ABSTRACT:
Methods of enabling the use of defective programmable devices. The method comprises performing functional testing for each programmable device of a plurality of programmable devices; identifying each programmable device of the plurality of programmable devices having a defective portion of programmable blocks; identifying, for each programmable device which is identified to have a defective portion of programmable blocks, a location of the defective portion; and storing, for each programmable device which is identified to have a defective portion of programmable blocks, the location of the defective portion on the programmable device.
REFERENCES:
patent: 4899067 (1990-02-01), So et al.
patent: 5153880 (1992-10-01), Owen et al.
patent: 5255227 (1993-10-01), Haeffele
patent: 5349248 (1994-09-01), Goetting et al.
patent: 5430734 (1995-07-01), Gilson
patent: 5434514 (1995-07-01), Cliff et al.
patent: 5459342 (1995-10-01), Nogami et al.
patent: 5485102 (1996-01-01), Cliff et al.
patent: 5498975 (1996-03-01), Cliff et al.
patent: 5513144 (1996-04-01), O'Toole
patent: 5592102 (1997-01-01), Lane et al.
patent: 5689516 (1997-11-01), Mack et al.
patent: 5742556 (1998-04-01), Tavrow et al.
patent: 5761483 (1998-06-01), Trimberger
patent: 5764577 (1998-06-01), Johnston et al.
patent: 5777887 (1998-07-01), Marple et al.
patent: 5796750 (1998-08-01), Lottridge et al.
patent: 5925920 (1999-07-01), MacArthur et al.
patent: 5931959 (1999-08-01), Kwiat
patent: 5963463 (1999-10-01), Rondeau, II et al.
patent: 5991215 (1999-11-01), Brunelle
patent: 5996096 (1999-11-01), Dell et al.
patent: 6003150 (1999-12-01), Stroud et al.
patent: 6107821 (2000-08-01), Kelem et al.
patent: 6166559 (2000-12-01), McClintock et al.
patent: 6167558 (2000-12-01), Trimberger
patent: 6201404 (2001-03-01), Reddy et al.
patent: 6202182 (2001-03-01), Abramovici et al.
patent: 6247147 (2001-06-01), Beenstra et al.
patent: 6279146 (2001-08-01), Evans et al.
patent: 6289292 (2001-09-01), Charlton et al.
patent: 6292925 (2001-09-01), Dellinger et al.
patent: 6311316 (2001-10-01), Huggins et al.
patent: 6344755 (2002-02-01), Reddy et al.
patent: 6496971 (2002-12-01), Lesea et al.
patent: 6530071 (2003-03-01), Guccione et al.
patent: 6560740 (2003-05-01), Zuraski, Jr. et al.
patent: 6594610 (2003-07-01), Toutounchi et al.
patent: 6618686 (2003-09-01), Allamsetty
patent: 6664808 (2003-12-01), Ling et al.
patent: 6668237 (2003-12-01), Guccione et al.
patent: 6681353 (2004-01-01), Barrow
patent: 6704889 (2004-03-01), Veenstra et al.
patent: 6725442 (2004-04-01), Cote et al.
patent: 6744274 (2004-06-01), Arnold et al.
patent: 6779133 (2004-08-01), Whetsel
patent: 6807631 (2004-10-01), Fuller et al.
patent: 6817006 (2004-11-01), Wells et al.
patent: 6839792 (2005-01-01), Feldstein et al.
patent: 6864710 (2005-03-01), Lacey et al.
patent: 6915503 (2005-07-01), Lesea
patent: 6918027 (2005-07-01), Mantey et al.
patent: 6924663 (2005-08-01), Masui et al.
patent: 6925407 (2005-08-01), Duppong
patent: 6961884 (2005-11-01), Draper
patent: 6973608 (2005-12-01), Abramovici et al.
patent: 7007250 (2006-02-01), Bapat et al.
patent: 7045472 (2006-05-01), Cooney et al.
patent: 7047465 (2006-05-01), Trimberger
patent: 7071679 (2006-07-01), Sabih et al.
patent: 7080300 (2006-07-01), Herron et al.
patent: 7089466 (2006-08-01), Odom et al.
patent: 7127697 (2006-10-01), Wells et al.
patent: 7133822 (2006-11-01), Jacobson
patent: 7146598 (2006-12-01), Horanzy
patent: 7180324 (2007-02-01), Chan et al.
patent: 7185293 (2007-02-01), Ofer
patent: 7185295 (2007-02-01), Park et al.
patent: 7187198 (2007-03-01), Akimichi
patent: 7187597 (2007-03-01), Trimberger
patent: 7209794 (2007-04-01), Duppong
patent: 7216277 (2007-05-01), Ngai et al.
patent: 7219278 (2007-05-01), Avery et al.
patent: 7227364 (2007-06-01), Fan et al.
patent: 7228521 (2007-06-01), Ma et al.
patent: 7233532 (2007-06-01), Vadi et al.
patent: 7240218 (2007-07-01), Kean
patent: 7251804 (2007-07-01), Trimberger
patent: 7269765 (2007-09-01), Charlton et al.
patent: 7284159 (2007-10-01), Chakraborty et al.
patent: 7284229 (2007-10-01), Trimberger
patent: 7307442 (2007-12-01), Ong
patent: 7363560 (2008-04-01), Mark et al.
patent: 7412635 (2008-08-01), Trimberger
patent: 7424655 (2008-09-01), Trimberger
patent: 2003/0212940 (2003-11-01), Wong
patent: 2004/0193979 (2004-09-01), Avery et al.
patent: 2005/0125512 (2005-06-01), Fuller et al.
patent: 2006/0259871 (2006-11-01), Washington et al.
U.S. Appl. No. 10/714,380, filed Oct. 31, 2003 by Trimberger.
U.S. Appl. No. 10/813,414, filed Mar. 29, 2004 by Stassart et al.
U.S. Appl. No. 11/895,132, filed Aug. 23, 2007, Trimberger.
U.S. Appl. No. 11/974,355, filed Oct. 11, 2007, Trimberger et al.
U.S. Appl. No. 11/974,387, filed Oct. 11, 2007, Trimberger.
U.S. Appl. No. 12/141,958, filed Jun. 19, 2008, Trimberger.
U.S. Appl. No. 12/141,959, filed Jun. 19, 2008, Trimberger.
U.S. Appl. No. 12/181,344, filed Jul. 29, 2008, Trimberger.
U.S. Appl. No. 12/181,346, filed Jul. 29, 2008, Trimberger.
Altera; Altera Data Sheet, vol. 1, Chapter 3 “Configuration and Testing”; and vol. 2 Chapter 8 “Remote System Upgrades with Stratix II Devices”; Feb. 2004; downloaded on Jun. 17, 2004 from http://www.altera.com/literature/lit-stx2.
Culbertson, W. Bruce et al.; “Defect Tolerance on the Teramac Custom Computer”; The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines; Apr. 16-18, 1997; pp. 116-123.
Emmert, John et al.; “Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration”; Annual IEEE Symposium on Field-Programmable Custom Computing Machines; Apr. 17, 2000; pp. 165-174.
Emmert, John M. et al.; “Incremental Routing in FPGAs”; ASIC Conference 1998. Proceedings, Eleventh Annual IEEE International; Rochester, NY; Sep. 13-16, 1998; pp. 217-221.
Hanchek, Fran et al.; “Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs”; The Proceedings of the Ninth International Conference on VLSI Design; Jan. 1996; pp. 1-4.
Xilinx, Inc.; DS031 v1.1, “Virtex-II Pro Platform FPGA Handbook”; published Dec. 6, 2000; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 33-75.
Barnie Rexford N
Hammond Crystal L
King John J.
XILINX Inc.
LandOfFree
Methods of enabling the use of a defective programmable device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of enabling the use of a defective programmable device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of enabling the use of a defective programmable device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4126692