Methods of controlling the erasing and writing of information in

Details Methods of controlling the erasing and writing of information in Methods of controlling the erasing and writing of information in

1994-02-23

1995-04-25

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Erase

365185, 365900, G11C 700, G11C 1140

Patent

active

054105110

ABSTRACT:
In a flash memory, the value of an erasing voltage pulse is temporarily set so that information stored in all the memory cells is erased by means of the erasing voltage pulse. The value of the erasing voltage pulse is reset so that the highest threshold voltage of all the reduced voltages of the memory cells after erasing reaches a specified value or under and that the leakage current generated in memory cells on the same bit line reaches a specified limit value or under. With the application of the reset erasing voltage pulse to all the memory cells, the content of the flash memory is erased, thereby preventing the misreading of the information stored in the memory due to the leakage current generated in the memory cells.

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Virgil N. Kynett et al., "An In-System Reprogrammable 32KX8 CMOS Flash Memory", IEEE Journal of Solid-State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1157-1163.
S. Yamada et al., "A Self-Convergence Erasing Scheme For A Simple Stacked Gate Flash EEPROM", IEDM Tech. Digest, 1991, p. 307-310.

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