Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2006-12-08
2008-11-25
Elms, Richard (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S189011, C365S185010
Reexamination Certificate
active
07457160
ABSTRACT:
Provided is a method of improving the read disturb characteristics of a flash memory array. According to the method, in a flash memory array having at least one cell string in which a string selection transistor, a plurality of memory cells, and a ground selection transistor are connected in series, first read voltage is applied to a string selection line connected to a gate of the string selection transistor and a ground selection line connected to a gate of the ground selection transistor. Ground voltage is applied to a word line of a memory cell selected from among the memory cells. Second read voltage is applied to word lines of memory cells, from among the memory cells that are not selected, which are adjacent to the string selection transistor and the ground selection transistor. Then, the first read voltage is applied to the other memory cells that are not selected. The second read voltage is lower than the first read voltage.
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Han Eui-gyu
Han Gyeong-soo
Kang Hyung-seok
Kim Hoo-sung
Lee Jin-yub
Elms Richard
Myers Bigel Sibley & Sajovec P.A.
Nguyen Nam
Samsung Electronics Co,. Ltd.
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