Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-02-25
1999-09-28
Dutton, Brian
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438253, 438254, 438396, H01L 218242
Patent
active
059602937
ABSTRACT:
A method for forming a capacitor for an integrated circuit device includes the following steps. An interlayer dielectric layer is formed on a substrate, and a contact hole is formed in the interlayer dielectric layer. A first conductive layer is then formed on the interlayer dielectric layer, wherein the first conductive layer is electrically connected to the substrate through the contact hole. A hole having a depth less than the thickness of the first conductive layer is etched in the first conductive layer. An insulating layer is formed in the hole and the first conductive layer is then etched to a predetermined depth using the insulating layer as an etching mask to expose a side wall of an upper portion of the insulating layer. A spacer is formed on the side wall of the upper portion of the insulating layer. The first conductive layer is then etched using the insulating layer and the spacer as etching marks to form an electrode structure. The insulating layer and spacer are then removed. Lastly, the capacitor is completed by forming a dielectric layer on the electrode structure and then forming a second conductive layer on the dielectric layer.
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Hong Weon-cheol
Shin Yun-Seung
Dutton Brian
Samsung Electronics Co,. Ltd.
Thomas Toniae M.
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