Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-11-14
2009-11-24
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S103000
Reexamination Certificate
active
07624239
ABSTRACT:
The present invention presents a number of improvements for managing erase processes in non-volatile memory. Such memory systems typically manage the memory by logically organize the basic unit of physical erase (erase block) into composite logical groupings (meta-blocks or logical group), where an erase block generally consists of a number of sectors. When an erase command is received, the specified sectors are checked against the memory system's control data. If the specified sectors span any full logical grouping, the full logical groupings can each be treated as a whole and erased according to one process (such as performing a true, physical erase), while other sectors are “logically” erased at the sector level by standard techniques.
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Bennett Alan David
Bryce Alan Douglas
Gorobets Sergey Anatolievich
Bragdon Reginald G
Davis , Wright, Tremaine, LLP
Lo Kenneth M
SanDisk Corporation
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