Methods for protecting gate stacks during fabrication of...

Details Methods for protecting gate stacks during fabrication of... Methods for protecting gate stacks during fabrication of...

2010-06-14

2011-12-27

Pham, Hoai V (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S412000, C257SE27060

Reexamination Certificate

active

08084828

ABSTRACT:
Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. In an embodiment, a method for fabricating a semiconductor device comprises forming a gate stack comprising a first gate stack-forming layer overlying a semiconductor substrate and forming first sidewall spacers about sidewalls of the gate stack. After the step of forming the first sidewall spacers, a portion of the first gate stack-forming layer is exposed. The exposed portion is anisotropically etched using the gate stack and the first sidewall spacers as an etch mask. Second sidewall spacers are formed adjacent the first sidewall spacers after the step of anisotropically etching.

REFERENCES:
patent: 5102815 (1992-04-01), Sanchez
patent: 6037630 (2000-03-01), Igarashi et al.
patent: 7524716 (2009-04-01), Ting et al.
patent: 2010/0099229 (2010-04-01), Chiu et al.

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