Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1995-10-16
1998-09-15
Gossage, Glenn
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
395595, 395736, 395737, 365218, 36518533, 711103, 711167, G06F 1200, G06F 946, G11C 1602
Patent
active
058095411
ABSTRACT:
A method of prioritizing program and erase commands received in an operation queue for a memory includes the step of storing a placeholder erase command in the operation queue. Subsequent erase commands are absorbed by 1) storing the subsequent erase command in the operation queue; 2) setting a corresponding status indicator for the block designated by the subsequent erase command; and 3) removing the subsequent erase command from the operation queue, wherein the subsequent erase command becomes an absorbed erase command. If a program command that designates a same block as any one of the placeholder and absorbed erase commands is stored in the operation queue, then 1) the same block is erased; 2) the status indicator for the same block is cleared, if the same block is associated with the absorbed command; 3) the program command is executed; and 4) the program command is removed from the operation queue. If the program command does not designate a same block as any one of the placeholder and absorbed erase commands, then 1) the program command is executed; and 2) the program command is removed from the operation queue. In either case, the method then returns to continue absorbing subsequently received erase commands. This allows more erase commands to be queued for execution than what the depth of the operation queue otherwise permits.
REFERENCES:
patent: 4752871 (1988-06-01), Sparks et al.
patent: 5034922 (1991-07-01), Burgess
patent: 5224070 (1993-06-01), Fandrich et al.
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5287469 (1994-02-01), Tsuboi
patent: 5333300 (1994-07-01), Fandrich
patent: 5341330 (1994-08-01), Wells et al.
patent: 5353256 (1994-10-01), Fandrich et al.
patent: 5355464 (1994-10-01), Fandrich et al.
patent: 5369616 (1994-11-01), Wells et al.
patent: 5414829 (1995-05-01), Fandrich et al.
patent: 5418752 (1995-05-01), Harari et al.
patent: 5463757 (1995-10-01), Fandrich et al.
Patent Abstracts of Japan, vol. 18, No. 436 (P-1786), Publication Date: May 13, 1994, Patent: A 6131889, Patentee: Toshiba Corp., Patent Date: May 13, 1994, p. 1 of 1.
Rapport de Recherche Preliminaire de Republique Francaise (French Search Report), Sep. 23, 1996, 2 pages.
Durante Richard Joseph
Fandrich Mickey Lee
Goodell Timothy Wade
Gould Geoffrey Alan
Gossage Glenn
Intel Corporation
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