Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-12-28
2011-11-29
Peugh, Brian (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S213000, C711S217000
Reexamination Certificate
active
08069311
ABSTRACT:
A method includes detecting a cache miss. The method further includes, in response to detecting the cache miss, traversing a plurality of linked memory nodes in a memory storage structure being used to store data to determine if the memory storage structure is a binary tree. The method further includes, in response to determining that the memory storage structure is a binary tree, prefetching data from the memory storage structure. An associated machine readable medium is also disclosed.
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Intel Corporation
Peugh Brian
Simonetti Nicholas
Trop, Pruner & Hu P. C.
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