Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-02-22
2005-02-22
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S759000, C438S396000
Reexamination Certificate
active
06858535
ABSTRACT:
The present invention provides a method for forming a discontinuous conductive layer in the fabrication of integrated circuits. The method includes providing a substrate assembly having a surface including at least one metal-containing adhesion region separated by at least one surface region of the substrate assembly. A conductive metal layer is formed on the surface of the substrate assembly. The substrate assembly including the conductive metal layer thereon is then annealed. Any nonadhered conductive metal is removed from the at least one exposed surface region to form a discontinuous conductive metal layer on at least one metal-containing adhesion region, for example, by simply rinsing the substrate assembly in water. The conductive metal layer can be platinum or ruthenium.
REFERENCES:
patent: 4804438 (1989-02-01), Rhodes
patent: 5191510 (1993-03-01), Huffman
patent: 5372849 (1994-12-01), McCormick et al.
patent: 5392189 (1995-02-01), Fazan et al.
patent: 5489548 (1996-02-01), Nishioka et al.
patent: 5665628 (1997-09-01), Summerfelt
patent: 5981390 (1999-11-01), Lee et al.
patent: 6030847 (2000-02-01), Fazan et al.
patent: 6054331 (2000-04-01), Woo et al.
patent: 6117689 (2000-09-01), Summerfelt
patent: 6127277 (2000-10-01), DeOrnellas et al.
patent: 6218297 (2001-04-01), Marsh
Ghandi, S.K., VLSI Fabrication Principles, 1983, John Wiley & Sons, Inc., pp. 517-520.*
Gniewek et al., “Enhancement of Pt Adhesion Using a Si Underlay,”IBM Technical Disclosure Bulletin, 20(3), 1009 (1977).
Hofer et al., “Double Layer Lift-Off Process for Packaging,”IBM Technical Disclosure Bulletin, 26(7B), 3771 (1983).
Fourson George
Maldonado Julio J.
Micro)n Technology, Inc.
Mueting Raasch & Gebhardt, P.A.
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