Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing
Reexamination Certificate
2011-03-08
2011-03-08
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
C438S460000
Reexamination Certificate
active
07904855
ABSTRACT:
Disclosed are a method and a system for partially removing circuit patterns from a multi-project wafer. This method and this system can be used to provide a multi-project-wafer to a user without disclosing proprietary circuit information of other customers. At least one integrated circuit design of a user is identified from a plurality of integrated circuit designs of a plurality of users. Those unidentified circuits can be totally removed through circuit removing method. Then the modified multi-project wafer can be delivered to the user without concerns about disclosing information of unidentified circuits which belongs to other customers. In one embodiment, a laser system may be used to totally remove the unidentified integrated circuit designs without impacting the circuit performance of identified circuits. In another embodiment, a diamond-blade saw may also be used to totally remove the unidentified integrated circuit designs without impacting the circuit performance of identified circuits.
REFERENCES:
patent: 4144536 (1979-03-01), Ardezzone et al.
patent: 6788091 (2004-09-01), Weber
patent: 6943429 (2005-09-01), Glenn et al.
patent: 7032191 (2006-04-01), Malekkhosravi et al.
patent: 7197723 (2007-03-01), Braun et al.
patent: 7393754 (2008-07-01), Iwane et al.
patent: 7538000 (2009-05-01), Dao
patent: 2003/0047543 (2003-03-01), Peng et al.
patent: 2003/0097644 (2003-05-01), Hong
patent: 2004/0181769 (2004-09-01), Kochpatcharin et al.
patent: 2005/0149899 (2005-07-01), Chao et al.
patent: 2005/0193353 (2005-09-01), Malekkhosravi et al.
patent: 2006/0074506 (2006-04-01), Braun et al.
patent: 2006/0105545 (2006-05-01), Tseng et al.
patent: 2007/0289957 (2007-12-01), Eiterer et al.
patent: 2009/0239313 (2009-09-01), Anemikos et al.
patent: 2005110662 (2005-11-01), None
Bernold Richerzhagen, Delphine Perrottet and Yasushi Kozuki, “Dicing of Wafers by Patented Water-Jet-Guided Laser; The Total Damage-Free Cut,” JLPS 2005, Jun. 12, 2005, Tokyo, Japan.
Woo Chun Choi and George Chryssolouris, “Analysis of the Laser Grooving and Cutting Processes,” Journal of Physics. D. Applied physics, 1995, pp. 873-878, vol. 28, n-5, IOP Publishing Ltd., United Kingdom.
“The Water Jet Guided Laser Technology,” Synova S.A., http://www.synova.ch/main.php, printed on Mar. 27, 2006.
Chinese Patent Office, Chinese Office Action, Aug. 14, 2009, 5 Pages, Application No. 20081016911X.
Tseng Yi-Hong
Wu Kuan-Liang
Dimyan Magid Y
Haynes and Boone LLP
Taiwan Semiconductor Manufacturing Company , Ltd.
Whitmore Stacy A
LandOfFree
Methods for partially removing circuit patterns from a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods for partially removing circuit patterns from a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for partially removing circuit patterns from a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2781816