Methods for modifying solid phase crystallization kinetics for A

Details Methods for modifying solid phase crystallization kinetics for A Methods for modifying solid phase crystallization kinetics for A

1997-04-10

2000-12-26

Beck, Shrive

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Amorphous semiconductor

438482, 427508, 427509, 427521, 427559, 427125, 42725518, 42725527, 4273762, H01L 2120, B05D 306

Patent

active

061658758

ABSTRACT:
This invention is directed toward methods for fabricating polycrystalline thin films. More particularly, the invention is directed toward optimized solid phase crystallization of plasma enhanced chemical vapor deposited amorphous silicon thin films as a means for obtaining, with a low thermal budget, polycrystalline silicon thin films comprising larger grain sizes and smother surfaces. The process of plasma enhanced chemical vapor deposition is quantified for silane containing various types of dilutants, thereby allowing deposition temperature, type of dilutant, type of plasma and other parameters to be controlled to yield the desired crystallization grain size at the desired thermal budget. Methods of annealing, annealing temperature, and pre-annealment treatments are also quantified such that grain size and thermal budget can be controlled in the fabrication of polycrystalline silicon thin films. Methods and apparatus for the select regional crystallization of an originally amorphous thin film using photon radiation is disclosed, wherein these methods and apparatus yield polycrystalline thin films with maximum grain size at a minimum thermal budget.

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