Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2006-09-05
2006-09-05
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C257S413000
Reexamination Certificate
active
07101777
ABSTRACT:
The present invention provides a method for manufacturing a stacked-gate structure in a semiconductor device. The method includes the steps of sequentially forming a gate dielectric layer, a poly-silicon layer, a titanium layer, and a WNXlayer on a semiconductor substrate, carrying out a rapid thermal annealing (RTA) in a nitrogen ambient, forming a silicon nitride layer on the tungsten layer, and patterning the multilayer thin-film structure into a predetermined configuration.
REFERENCES:
patent: 6277719 (2001-08-01), Chern et al.
patent: 6306743 (2001-10-01), Lee
patent: 6800543 (2004-10-01), Taguwa
Ho Tzu-En
Wu Chang-Rong
Bednarek Michael
Nanya Technology Corporation
Pillsbury Winthrop Shaw & Pittman LLP
Vu David
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