Methods for manufacturing shallow trench isolation layers of...

Details Methods for manufacturing shallow trench isolation layers of... Methods for manufacturing shallow trench isolation layers of...

2005-08-01

2008-09-16

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S424000, C438S734000

Reexamination Certificate

active

07425511

ABSTRACT:
A method for forming a shallow trench isolation layer that includes: forming a pad oxide on a substrate; forming a hard mask silicon nitride on the pad oxide; forming a moat pattern on the pad oxide and hard mask; etching partially the pad oxide and hard mask with the moat pattern to open the silicon nitride; and ashing process for removing the moat pattern.

REFERENCES:
patent: 5856003 (1999-01-01), Chiu
patent: 6831018 (2004-12-01), Kanegae

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