Methods for making semiconductor devices having air dielectric i

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438622, 438624, 438627, 438637, 438691, 438926, H01L 2144, H01L 21461

Patent

active

060572248

ABSTRACT:
A method of making an integrated circuit interconnect structure having air as the effective dielectric between metallization layers includes the steps of: a) providing an air dielectric formation layer of a sacrificial material over a substrate; b) forming a pillar holes in the air dielectric formation layer; c) filling the pillar holes with a non-sacrificial material; d) constructing a metallization layer over the sacrificial air dielectric formation layer and non-sacrificial material pillars; and e) applying an isotropic etchant to the interconnect structure to remove the sacrificial material, leaving the non-sacrificial material pillars for mechanical support of the metallization layer. An interconnect structure having an air dielectric includes a bottom metallization layer, a top metallization layer, and a plurality of pillars separating the bottom and top metallization layers and mechanically supporting the top metallization layer. Additional similar interconnect structures can be stacked over a base interconnect structure.

REFERENCES:
patent: 4561173 (1985-12-01), Te Velde
patent: 5117276 (1992-05-01), Thomas et al.
patent: 5141896 (1992-08-01), Katoh
patent: 5171713 (1992-12-01), Matthews
patent: 5413962 (1995-05-01), Lur et al.
patent: 5444015 (1995-08-01), Aitken et al.
patent: 5530280 (1996-06-01), White
patent: 5565707 (1996-10-01), Colgan et al.
patent: 5567982 (1996-10-01), Bartelink
S. Bothra, B. Rogers, M. Kellam, and C.M. Osburn, "Analysis of the Effects of Scaling on Interconnect Delay in ULSI Circuits," IEEE Transactions on Electron Devices, vol. 40, No. 3, Mar. 1993.
M.E. Thomas, J.A. Saadat, and S. Sekigahama, "VLSI Multilevel Micro-Coaxial Interconnects for High Speed Devices," Fairchild Research Center, National Semiconductor Corp., Santa Clara, CA, CH2865-4/90/0000-0055 1990 IEEE.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods for making semiconductor devices having air dielectric i does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for making semiconductor devices having air dielectric i, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for making semiconductor devices having air dielectric i will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1593502

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.