Methods for making high-aspect ratio holes in semiconductor and

Details Methods for making high-aspect ratio holes in semiconductor and Methods for making high-aspect ratio holes in semiconductor and

1998-08-19

2000-05-16

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438270, 438675, 438637, 257368, H01L 213205, H01L 214763

Patent

active

060636998

ABSTRACT:
The present invention provides a process of fabricating high aspect ratio holes (H/L is 2 or greater) in a semiconductor structure wherein a masked gate-like reactive ion etch process is employed. The high aspect ratio holes have perfectly vertical sidewalls thus they are particularly useful in fabricating gate electrodes of sub-0.05 .mu.m MOSFETs using a damascene process.

REFERENCES:
patent: 4160991 (1979-07-01), Anantha et al.
patent: 5358882 (1994-10-01), Bertagnolli et al.
patent: 5397731 (1995-03-01), Takemura
patent: 5489792 (1996-02-01), Hu et al.
patent: 5599728 (1997-02-01), Hu et al.
patent: 5777514 (1998-06-01), Matsuda et al.

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