Methods for making a dielectric stack in an integrated circuit

Details Methods for making a dielectric stack in an integrated circuit Methods for making a dielectric stack in an integrated circuit

2006-05-02

2006-05-02

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S310000

Reexamination Certificate

active

07038284

ABSTRACT:
An ultrathin aluminum oxide and lanthanide layers, particularly formed by an atomic layer deposition (ALD) type process, serve as interface layers between two or more materials. The interface layers can prevent oxidation of a substrate and can prevent diffusion of molecules between the materials. In the illustrated embodiments, a high-k dielectric material is sandwiched between two layers of aluminum oxide or lanthanide oxide in the formation of a transistor gate dielectric or a memory cell dielectric. Aluminum oxides can serve as a nucleation layer with less than a full monolayer of aluminum oxide. One monolayer or greater can also serve as a diffusion barrier, protecting the substrate from oxidation and the high-k dielectric from impurity diffusion. Nanolaminates can be formed with multiple alternating interface layers and high-k layers, where intermediate interface layers can break up the crystal structure of the high-k materials and lower leakage levels.

REFERENCES:
patent: 5316793 (1994-05-01), Wallace et al.
patent: 5719417 (1998-02-01), Roeder et al.
patent: 5763922 (1998-06-01), Chau
patent: 6091122 (2000-07-01), Buchanan et al.
patent: 6124158 (2000-09-01), Dautartas et al.
patent: 6124620 (2000-09-01), Gardner et al.
patent: 6144060 (2000-11-01), Park et al.
patent: 6335240 (2002-01-01), Kim et al.
patent: 6407435 (2002-06-01), Ma et al.
patent: 6660660 (2003-12-01), Haukka et al.
patent: 6674138 (2004-01-01), Halliyal et al.
patent: 2001/0006735 (2001-07-01), Kim et al.
patent: 10308283 (1998-11-01), None
patent: 11233726 (1999-08-01), None
patent: 58033841 (1983-02-01), None
patent: WO 00/42667 (2000-07-01), None
patent: WO 00/55895 (2000-09-01), None
Haukka, S. et al: “Growth mechanism of mixed oxides on alumina”, Applied Surface Science, Mar. 1997, vol. 112, pp. 23-29.
Kattelus, H. et al., “Electrical Properties of Tantalum Based Composite Oxide Films,”Mat. Res. Soc. Symp. Proc., vol. 284, pp. 511-516 (1993).
Kattelus, H. et al., “Layered tantalum-aluminum oxide films deposited by atomic layer epitaxy,”Thin Solid Films, vol. 225, pp. 296-298 (1993).
Kim et al., EPAB Pub. No. DE019853598A1 “Manufacture of thin films by atomic layer deposition”, Feb. 10, 2000.
Kim. Y.K. et al., “Novel capicitor technology for high density stand-alone and embedded DRAMs”IEEE International Electron Devices Meeting, IEDM (2000).
Kukli, K. et al., “Properties of Ta2O5-Based Dielectric Nanolaminates Deposited by Atomic Layer Epitaxy,”J. Electrochem. Soc., vol. 144, No. 1, pp., 300-306 (1997).
Kukli, K. et al., Properties of (Nb1-xTax)2O5-ZrO2Nanolaminates Grown by Atomic Layer Epitaxy, NanoStructured Materials, vol. 8, No. 7, pp. 785-793 (1997).
Kukli, K., “Properties of atomic layer deposited (Ta1-xNbx)2O5solid solution films and Ta2O2-Nb2O5nanolaminates,” Journal of Applied Physics, vol. 86, No. 10 (1999).
Lakomaa, E-L. et al., “Surface reactions in Al2O3growth from trimethylaluminum and water by atomic layer epitaxy,” Applied Surface Science, vol. 107, pp. 107-115 (1996).
Matero et al., “Effect of water dose on the automatic layer deposition rate of oxide thin films.”, Elsevier, Thin Solid Films 368 (2000) ppg. 1-7.
Peter Singer “Atomic Layer Deposition Targets Thin Films” Semiconductor International, Sep. 1, 1999.
Ritala, M. et al., “Surface roughness reduction in atomic layer epitaxy growth of titanium dioxide thin films,”Thin Solid Films, vol. 249, pp. 155-162 (1994).
Zhang, H. et al., “High permittivity thin film nanolaminates,”Journal of Applied Physics, vol. 87, No. 4, pp. 1921-1924 (2000).

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