Methods for making a dielectric stack in an integrated circuit

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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Reexamination Certificate

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06660660

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to thin dielectric films in integrated circuits, and more particularly to interface layers for dielectric thin films.
BACKGROUND AND SUMMARY OF THE INVENTION
Atomic Layer Deposition (ALD) is a self-limiting process, whereby alternated pulses of reaction precursors saturate a substrate and leave no more than one monolayer of material per pulse. The precursors and deposition conditions are selected to ensure self-saturating reactions. For example, an adsorbed layer in one pulse leaves a surface termination that is non-reactive with the gas phase reactants of the same pulse. A subsequent pulse of different reactants do react with the previous termination to enable continued deposition. Thus, each cycle of alternated pulses leaves no more than about one molecular layer of the desired material. The principles of ALD type processes have been presented by T. Suntola, e.g. in the Handbook of Crystal Growth 3, Thin Films and Epitaxy, Part B: Growth Mechanisms and Dynamics, Chapter 14, Atomic Layer Epitaxy, pp. 601-663, Elsevier Science B.V. 1994.
Recently, these processes have been suggested for use in semiconductor fabrication. However, due to the slowness of the process (depositing one atomic layer of material per cycle), ALD has been of little practical benefit for current commercial process flows.
One material for which ALD processes have been developed is aluminum oxide (Al
2
O
3
). The deposition of aluminum oxide by ALD type processes is well known in the art. See, e.g., E.-L. Lakomaa, A. Root, T. Suntola, “Surface reactions in Al
2
O
3
growth from trimethylaluminium and water by atomic layer epitaxy”, Appl. Surf. Sci. 107 (1996) 107-115. This article is incorporated herein by reference.
In accordance with one aspect of the invention, an oxide interface layer is provided for a dielectric structure positioned between two conductive materials in an integrated circuit. The preferred embodiments employ metal oxide thin films for the interface layer, particularly aluminum oxide and lanthanide (“rare earth”) oxides, which can advantageously remain amorphous even after exposure to high temperatures. The oxide interface layer is preferably deposited by an atomic layer deposition (ALD) type process. Advantageously, the preferred interface materials do not readily react with many other materials and are very good barriers against the diffusion of molecules, atoms and ions. Al
2
O
3
and lanthanide oxides can be deposited by ALD processes with excellent control; extremely thin, uniformly thick layers can be formed without pinholes and at a wide range of substrate temperatures, depending on the source chemicals. Thus, ALD enables oxide layers thin enough to serve as an interface layer without adversely affecting electrical properties of the integrated circuit.
In accordance with another aspect of the invention, a high dielectric constant (high-k) dielectric structure is provided in an integrated circuit. The high-k dielectric structure comprises a first interfacial layer of aluminum oxide, a layer of high-k material directly adjacent the first interfacial layer, and a second interfacial layer of aluminum oxide directly adjacent the high-k material. The high-k material preferably has a dielectric constant of at least about 5, and more preferably at least about 10. Exemplary high-k materials include, but are not limited to, zirconium oxide (ZrO
2
), hafnium oxide (HfO
2
), titanium oxide (TiO
2
), tantalum oxide (Ta
2
O
5
), barium strontium titanate (BST), strontium titanate (ST), barium titanate (BT), lead zirconium titanate (PZT), lead strontium titanate (PST), strontium bismuth tantalate (SBT), metal silicates, aluminum nitride and nitrided metal oxides (e.g., Ta
x
O
y
Nb
z
, Nb
x
O
y
N
z
). The aluminum oxide interfacial layers can also be replaced by lanthanide oxide layers.
The dielectric structure is positioned between a first conductor and a second conductor. Aluminum oxide and lanthanide oxides have been found particularly beneficial as interface layers between doped semiconductor structures, such as a doped silicon substrate in a transistor structure, and other dielectric materials. Furthermore, their excellent interfacial properties facilitate advanced materials. For example, aluminum oxide has been found particularly advantageous between high-k materials and poly-SiGe gate electrodes. During CVD of SiGe, nucleation over ALD Al
2
O
3
during initial phases of deposition was found superior to that over SiO
2
, thus speeding overall deposition rates. Other gate electrode materials may also be made possible due to superior nucleation of depositions thereover and protection against corrosion and impurity diffusion offered by the aluminum oxide interface between the gate electrode and the high-k material. In another example, a high-k dielectric structure (including a high-k material sandwiched between aluminum or lanthanide oxide interfacial layers) serves as a capacitor dielectric in an integrated circuit. The interfacial layers are of particular utility over silicon electrodes, such as hemispherical grained silicon (HSG-Si), but are also useful barriers for protection of other oxidation-susceptible electrode materials.
Another aspect of the present invention is an aluminum oxide layer or a lanthanide oxide layer located between two materials, where the oxide layer has a thickness between one full molecular monolayer and about 4 molecular monolayers. The oxide layer prevents diffusion of molecules from one material to the other.
Another aspect of the invention provides a method of preventing the oxidation of a substrate by depositing a layer of aluminum oxide or lanthanide oxide on the substrate by an ALD type process. Substrates otherwise susceptible to oxidation include conventional semiconductor substrates, such as single-crystal silicon wafers or epitaxial layers.


REFERENCES:
patent: 5316793 (1994-05-01), Wallace et al.
patent: 5719417 (1998-02-01), Roeder et al.
patent: 5763922 (1998-06-01), Chau
patent: 6124158 (2000-09-01), Dautartas et al.
patent: 6124620 (2000-09-01), Gardner et al.
patent: 6144060 (2000-11-01), Park et al.
patent: 6335240 (2002-01-01), Kim et al.
patent: 2001/0006735 (2001-07-01), Kim et al.
patent: 10308283 (1998-11-01), None
patent: 11233726 (1999-08-01), None
patent: 58-033841 (1983-02-01), None
patent: WO 00/42667 (2000-07-01), None
patent: WO 00/55895 (2000-09-01), None
Kim et al. EPAB Pub. No. DE019853598A1 “Manufacture of thin film by atomic layer deposition” Feb. 10, 2000.*
Peter Singer “Atomic Layer Deposition Targets Thin Films” Semiconductor International Sep. 1, 1999.*
Haukka, S. et al: “Growth mechanism of mixed oxides on alumina”, Applied Surface Science, Mar. 1997, vol. 112, pp. 23-29.
Kattelus, H. et al., “Electrical Properties of Tantalum Based Composite Oxide Films,”Mat. Res. Soc. Symp. Proc., vol. 284, pp. 511-516 (1993).
Kattelus, H. et al., “Layered tantalum-aluminum oxide films deposited by atomic layer epitaxy,”Thin Solid Films, vol. 225, pp. 296-298 (1993).
Kim. Y. K. et al., “Novel capicitor technology for high density stand-alone and embedded DRAMs,”IEEE International Electron Devices Meeting, IEDM (2000).
Kukli, K. et al., Properties of (Nb1-xTax)2O5Solid Solutions and (Nb1-xTax)2O5-ZrO2Nanolaminates Grown by Atomic Layer Epitaxy,NanoStructured Materials, vol. 8, No. 7, pp. 785-793 (1997).
Kukli, K. et al., “Properties of Ta2O5-Based Dielectric Nanolaminates Deposited by Atomic Layer Epitaxy,”J. Electrochem. Soc., vol. 144, No. 1, pp. 300-306 (1997).
Kukli, K., “Properties of atomic layer deposited (Ta1-xNbx)2O5solid solution films and Ta2O5nanolaminates,”Journal of Applied Physics, vol. 86, No. 10 (1999).
Lakomaa, E-L. et al., “Surface reactions in AI2O3growth from trimethylaiuminum and water by atomic layer epitaxy,”Applied Surface Science, vol. 107, pp. 107-115 (1996).
Ritala, M. et al., “Surface roughness reduction in atomic layer epitaxy growth of titanium dioxide thin films,”Thin Solid Films, vol. 249, pp. 155-162 (1994).
Zhang, H. et al., “High permittivity t

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