Methods for forming liquid crystal displays including thin film

Details Methods for forming liquid crystal displays including thin film Methods for forming liquid crystal displays including thin film

1996-12-30

1998-03-24

Gross, Anita Pellman

Liquid crystal cells, elements and systems

Particular excitation of liquid crystal

Electrical excitation of liquid crystal

349 46, 349147, 349152, G02F 1136, G02F 11343, G02F 11345

Patent

active

057318565

ABSTRACT:
A method for forming a liquid crystal display includes the steps of depositing a first metal layer on a substrate, and depositing a second metal layer on the first metal layer opposite the substrate. The first and second metal layers are patterned to provide a gate electrode on a TFT area of the substrate and to provide a gate pad on a pad area of the substrate. An insulating layer is formed on the gate electrode and on the gate pad, and on the substrate, and a semiconductor layer is formed on the insulating layer opposite the gate electrode wherein the semiconductor layer includes a channel region opposite the gate electrode and first and second spaced apart source/drain regions separated by the channel region. First and second spaced apart metal source/drain electrodes are formed on the respective first and second spaced apart semiconductor source/drain regions, and a protective layer is formed on the exposed portion of the first semiconductor layer opposite the substrate, on the first and second metal source/drain electrodes opposite the substrate, and on the insulating layer opposite the gate pad. A first contact hole is formed in the protective layer exposing a portion of one of the source/drain electrodes, and a second contact hole is formed in the protective layer and the insulating layer exposing a portion of the gate pad wherein the second contact hole exposes only a surface portion of the gate pad opposite the substrate. A transparent conductive layer is formed on the protective layer opposite the substrate, and the transparent conductive layer is patterned to form a pixel electrode electrically connected to the exposed portion of the source/drain electrode and to the exposed portion of the gate pad.

REFERENCES:
patent: 5162933 (1992-11-01), Kakuda et al.
patent: 5581382 (1996-12-01), Kim
patent: 5684547 (1997-11-01), Park et al.

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