Methods for forming isolation trenches including doped silicon o

Details Methods for forming isolation trenches including doped silicon o Methods for forming isolation trenches including doped silicon o

1996-10-31

1999-05-11

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438428, 438433, 438436, 438438, 148DIG50, H01L21/76

Patent

active

059021276

ABSTRACT:
A method for forming a microelectronic structure includes the steps of forming a trench in a substrate and forming an insulating layer which fills the trench and covers the substrate. Ions can be implanted into the insulating layer which decrease an etch rate of the insulating layer, and portions of the insulating layer on the substrate can be removed while maintaining the insulating layer in the trench. In addition, the step of forming the insulating layer can include forming an undoped oxide layer on the substrate and forming a doped oxide layer on the undoped oxide layer wherein a void is formed in the doped oxide layer. The void can thus be reduced by reflowing the doped oxide layer.

REFERENCES:
patent: 4571819 (1986-02-01), Rogers et al.
patent: 5316965 (1994-05-01), Philipossian et al.
patent: 5616513 (1997-04-01), Shepard

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