Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Reexamination Certificate
1999-07-30
2001-11-06
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
C427S294000
Reexamination Certificate
active
06313044
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a field of manufacturing a semiconductor device; and, more particularly, to methods for forming a spin-on-glass layer, which can enhance the flatness of the spin-on-glass layer (hereinafter, referred to SOG layer) as an interlayer insulating layer and its productivity.
DESCRIPTION OF THE PRIOR ART
Generally, a SOG layer is formed by spin coating. Before spin coating, SOG solution is formed by dissolving or suspending siloxane or silicate into solvent. The formed SOG solution is then spin-coated on a wafer by spreading it through nozzle to form the SOG layer. Thereafter, the coated layer is baked or cured for condensation.
FIG. 1
is a sectional view showing an open receptacle for forming the SOG layer according to the prior art. A wafer-supporting bar
20
is set up in the open receptacle
10
. It is also shown that a wafer
30
is placed on a supporting plate connected to the supporting bar. In the case of using the open receptacle for spin coating, the coating is performed under normal pressure.
It is a present-coming situation that the aspect ratio in a multiple-layer metal structure becomes high with high integration trend of semiconductor devices. Although the burial of via and flatness can be accomplished using the inherent flowage of SOG solution, the flatness is not completely accomplished even after spin-coating the SOG layer.
Furthermore, the thickness of the SOG layer formed by one time of the spin coating is restricted to below some value since the coated SOG solution loses its flowage during spin coating process. For example, it is difficult to form a SOG layer with the thickness of more than 2000Å by one time of spin coating, when the SOG layer is formed from siloxane or its derivative solution. So, in the prior art, after a first SOG layer
51
is formed on a wafer
30
having a metal wiring pattern
40
(as shown in
FIG. 2
a
), a second SOG layer
52
is formed on the first SOG layer
51
(as shown in
FIG. 2
b
) . That is to say, the number of spin coating should be determined according to the thickness of the needed SOG layer. For example, when the thickness of the needed SOG layer is larger than 2000Å, the number of spin coating should increase one time or more.
As described above, in order to form the needed thickness of the SOC layer, the spin coating should be performed with several times. Thus, there is a problem in the prior art that repeating the same process decreases the productivity.
There is also another problem that when a contact hole is formed at subsequent process, bowing is produced at the sidewall of the contact hole due to etching residual material. The problem is caused from the thicker portion of the SOG layer on the metal wiring than the other portion, the thicker portion being resulted from insufficient flattening.
There is still another problem that the conventional spin coating produces edge beads, which increase the probability of breaking the wafer at the portion during subsequent processes.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method for forming a SOG layer, which can enhance flatness.
It is, also, another object of the present invention to provide a method for forming a SOG layer, which can maximally suppress the production of edge beads generated by spin coating and inhibit the bowing generated during etching of the SOG layer for forming a contact hole, with enhancing the flatness.
It is, still also, another object of the present invention to provide a method for forming a SOG layer which can form the thicker SOG layer than the prior art and thus, form the needed thickness of the SOG layer only by one time of spin coating, with enhancing the flatness.
In accordance with an embodiment of the present invention, there is provided a method for forming a spin-on-glass (SOG) layer for flattening a semiconductor device, the method comprising the steps of spin-coating SOG solution on a wafer to form the SOG layer (first step); and, spreading SOG solvent in a closed receptacle containing the wafer and making a saturated vapor pressure in the receptacle with spinning to allow the surface of the SOG layer to become flat (second step).
According to the method of the present invention, the SOG layer is spin-coated on a wafer and the SOG solvent is spread in a closed receptacle containing the wafer to make a saturated vapor pressure in the receptacle; thus, the thickness of the SOG layer can increase and the flatness of the SOG layer can be enhanced.
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Blakely & Sokoloff, Taylor & Zafman
Hyundai Electronics Industries Co,. Ltd.
Nelms David
Vu David
LandOfFree
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