Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2008-04-22
2008-04-22
Huff, Mark F. (Department: 1795)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S313000, C430S394000
Reexamination Certificate
active
10764905
ABSTRACT:
In a disclosed method for manufacturing a semiconductor device, a lower insulating layer, a lower metal line and an upper insulating layer are sequentially stacked. A first photosensitive film is patterned on the upper insulating layer and the upper insulating layer is subsequently etched. The photosensitive film is removed. An etched portion of the upper insulating layer is then filled with a nitride film. The upper insulating layer is then removed. A second photosensitive film is then patterned and the lower metal line is subsequently etched. An IMD layer is deposited over the resultant construct, thereby forming an air gap within the IMD layer. The IMD layer is planarized. The nitride film is then etched away to thereby form a hole in the IMD layer. The hole is filled with a conductive material to form a contact plug. An upper metal line is deposited over the resultant construct.
REFERENCES:
patent: 5652182 (1997-07-01), Cleeves
patent: 5710061 (1998-01-01), Cleeves
patent: 5869379 (1999-02-01), Gardner et al.
patent: 6159840 (2000-12-01), Wang
patent: 6221704 (2001-04-01), Furukawa et al.
patent: 6737725 (2004-05-01), Nitta et al.
patent: 02-047840 (1990-02-01), None
patent: 2001-0059161 (2001-07-01), None
patent: 2003-0000483 (2003-01-01), None
Eun Seok Hong; Method for Manufacturing Semiconductor Device; Korean Patent Abstracts; Publication No. 1020030000483; Publication Date: Jan. 6, 2003; Korean Intellectual Property Office.
Byeong Hak Lee; Method for Forming Metallic Wiring of Semiconductor Device; Korean Patent Abstracts; Publication No. 1020010059161; Publication Date: Jul. 6, 2001; Korean Intellectual Property Office.
Stanley Wolf, Ph.D.; Silicon Processing for the VLSI Era, vol. 4; Deep-Submicron Process Technology; 2002; pp. 322-323 and 458-462; Lattice Press, Sunset Beach, California.
Dongbu Electronics Co. Ltd.
Fortney Andrew D.
Huff Mark F.
Sullivan Caleen O.
LandOfFree
Methods for forming a metal line in a semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods for forming a metal line in a semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for forming a metal line in a semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3953463