Methods for fabricating semiconductor devices and contacts...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S586000, C438S587000, C438S279000, C257SE29300, C257SE21680, C257SE21422, C257SE21179

Reexamination Certificate

active

07462903

ABSTRACT:
Methods for fabricating semiconductor structures and contacts to semiconductor structures are provided. A method comprises providing a substrate and forming a gate stack on the substrate. The gate stack is formed having a first axis. An impurity doped region is formed within the substrate adjacent to the gate stack and a dielectric layer is deposited overlying the impurity doped region. A via is etched through the dielectric layer to the impurity doped region. The via has a major axis and a minor axis that is perpendicular to and shorter than the major axis. The via is etched such that the major axis is disposed at an angle greater than zero and no greater than 90 degrees from the first axis. A conductive contact is formed within the via.

REFERENCES:
patent: 4651183 (1987-03-01), Lange et al.
patent: 5140389 (1992-08-01), Kimura et al.
patent: 5309386 (1994-05-01), Yusuki et al.
patent: 5517041 (1996-05-01), Torii et al.
patent: 5635786 (1997-06-01), Fujimoto et al.
patent: 5723908 (1998-03-01), Fuchida et al.
patent: 5899717 (1999-05-01), Jun
patent: 6156601 (2000-12-01), Lee et al.
patent: 6200856 (2001-03-01), Chen
patent: 6291846 (2001-09-01), Ema et al.
patent: 6344391 (2002-02-01), Lee et al.
patent: 6614079 (2003-09-01), Lee et al.
patent: 6730570 (2004-05-01), Shin et al.
patent: 6743675 (2004-06-01), Ding
patent: 6747326 (2004-06-01), Tran
patent: 6878586 (2005-04-01), Kimura et al.
patent: 6900124 (2005-05-01), Kim et al.
patent: 6900540 (2005-05-01), Teig et al.
patent: 6936898 (2005-08-01), Pelham et al.
patent: 7045834 (2006-05-01), Tran et al.
patent: 7098512 (2006-08-01), Pelham et al.
patent: 7217962 (2007-05-01), Masleid
patent: 7326613 (2008-02-01), Yun et al.
patent: 7339221 (2008-03-01), Shiratake
patent: 7348640 (2008-03-01), Yamada
patent: 2001/0011176 (2001-08-01), Boukhny
patent: 2004/0038476 (2004-02-01), Tran
patent: 2004/0119100 (2004-06-01), Nowak et al.
patent: 2004/0147114 (2004-07-01), Park et al.
patent: 2004/0217407 (2004-11-01), Cho et al.
patent: 2005/0070080 (2005-03-01), Lee et al.
patent: 2005/0077560 (2005-04-01), Shiratake
patent: 2005/0218708 (2005-10-01), Gramss
patent: 2005/0272250 (2005-12-01), Yun et al.
patent: 2006/0138466 (2006-06-01), Choi
patent: 2007/0049010 (2007-03-01), Burgess et al.
patent: 2008/0048333 (2008-02-01), Seo et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods for fabricating semiconductor devices and contacts... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for fabricating semiconductor devices and contacts..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for fabricating semiconductor devices and contacts... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4037814

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.