Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2011-06-14
2011-06-14
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S197000, C438S689000, C438S694000
Reexamination Certificate
active
07960287
ABSTRACT:
Methods for fabricating FinFET structures having gate structures of different gate widths are provided. The methods include the formation of sidewall spacers of different thicknesses to define gate structures of the FinFET structures with different gate widths. The width of a sidewall spacer is defined by the height of the structure about which the sidewall spacer is formed, the thickness of the sidewall spacer material layer from which the spacer is formed, and the etch parameters used to etch the sidewall spacer material layer. By forming structures of varying height, forming the sidewall spacer material layer of varying thickness, or a combination of these, sidewall spacers of varying width can be fabricated and subsequently used as an etch mask so that gate structures of varying widths can be formed simultaneously.
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Johnson Frank Scott
Schultz Richard T.
Fernandes Errol
Globalfoundries Inc.
Ingrassia Fisher & Lorenz P.C.
Pham Thanh V
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