Methods for fabricating CVD TiN barrier layers for capacitor str

Details Methods for fabricating CVD TiN barrier layers for capacitor str Methods for fabricating CVD TiN barrier layers for capacitor str

1997-09-24

2000-01-04

Meeks, Timothy

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438399, 438381, 427 80, 427255391, 427255394, 4273766, 427377, C23C 1634

Patent

active

060109408

ABSTRACT:
A method of fabricating a capacitor for a integrated circuit device includes the steps of forming a lower capacitor electrode on an integrated circuit substrate, and forming a dielectric layer on the lower capacitor electrode opposite the integrated circuit substrate. A titanium nitride barrier layer is deposited by chemical vapor deposition on the dielectric layer opposite the integrated circuit substrate to a thickness in the range of 50 .ANG. to 500 .ANG. using TiCl.sub.4 as a source gas. The titanium nitride barrier layer is annealed, and an upper electrode is formed on the titanium nitride barrier layer opposite the integrated circuit substrate.

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Kwon et al., IEDM Technical Digest 93, pp. 53-56 (no month), 1993.
Lee et al., IEDM Technical Digest, pp. 683-686, Dec. 1996.
Hillman, J.T., et al., Comparison of Titanium Nitride Barrier Layers Produced by inorganic and Organic CVD, VMIC Conference Jun. 9-10, 1992 pp. 246-252.
Choi, Siyoung, et al., Thermal Stability of TiN Diffusion Barrier Under High Thermal Stress in W-Plug Common Contact, Advanced Metallization and Interconnection Systems for ULSI Applications in 1996, pp. 313-318 (1996) (no month).

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