Methods for exposing device features on a semiconductor device

Details Methods for exposing device features on a semiconductor device Methods for exposing device features on a semiconductor device

2007-05-01

2007-05-01

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S800000, C438S975000

Reexamination Certificate

active

10960660

ABSTRACT:
A semiconductor device includes alignment marks that are aligned with device features. The semiconductor device includes a device feature, a pair of first alignment marks, a pair of second alignment marks, and a pair of third alignment marks. The first alignment marks are aligned along a first direction with the device feature and adjacent to opposite sides of the device feature. The second alignment marks are aligned along a second direction with the device feature that is substantially perpendicular to the first direction, and adjacent to opposite sides of the device feature. The third alignment marks are aligned with the first alignment marks in the first direction and adjacent to opposite sides of the device feature, wherein the third marks are between the first alignment marks and the device feature, and each of the third marks have a shorter length along the first direction than each of the first alignment marks.

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patent: 5847468 (1998-12-01), Nomura et al.
patent: 6015744 (2000-01-01), Tseng
patent: 6902986 (2005-06-01), Maltabes et al.
patent: 2001-15570 (2001-01-01), None
patent: 2003-203959 (2003-07-01), None
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patent: 1020030029402 (2003-04-01), None
Notice to Submit a Response for Korean patent application No. 10-2003-0070974 mailed on Oct. 25, 2005.

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