Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2006-05-09
2006-05-09
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S782000, C438S456000, C438S458000, C438S462000
Reexamination Certificate
active
07042105
ABSTRACT:
Methods for dicing water stacks are provided. Preferably, the method includes the steps of: (1) providing a wafer stack having a first wafer and a second wafer; (2) exposing a portion of the first wafer by removing a portion of the second wafer; and (3) dicing the exposed portion of the first wafer such that a first die assembly is at least partially separated from the wafer stack. Wafer stacks and die assemblies also are provided.
REFERENCES:
patent: 6436793 (2002-08-01), Kneezel et al.
patent: 88105526.3 (1988-11-01), None
Kurino, et al., “A New Wafer Scale Chip-On-Chip Packaging Tech Using Adhesive Injection Method,” Jap. Journal of Applied Physics, vol. 32, No. 4B, Apr. 1999, pp 2406-2410.
Mirza, Institute of Electrical and Electronics Engineers: “On Micron Precision, Wafer-Level Aligned Bonding for Application,” vol. Conf. 50, May 21, 2000, pp. 676-680.
Foreign Search Report dated Oct. 13, 2005.
Harley Jonah A.
Hartwell Peter G.
Hoen Storrs T.
Horsley David
Fourson George
Hewlett--Packard Development Company, L.P.
Maldonado Julio J.
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