Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-03-24
2010-12-07
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07849429
ABSTRACT:
A method is provided for memory conservation in statistical static timing analysis. A timing graph is created with a timing run in a statistical static timing analysis program. A plurality of nodes in the timing graph that are candidates for a partial store and constraint points are identified. Timing data is persistently stored at constraint points. The persistent timing data is retrieved from the constraint points and used to calculate intermediate timing data at the plurality of nodes during timing analysis.
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Hemmett Jeffrey G.
Venkateswaran Natesan
Visweswariah Chandramouli
Zolotov Vladimir
Dimyan Magid Y
Do Thuan
International Business Machines - Corporation
Wood Herron & Evans LLP
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