Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-07-27
2009-06-16
Sough, Hyung S (Department: 2188)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S700000, C714S704000, C714S746000, C714S747000, C714S753000, C714S762000, C341S093000, C341S094000, C341S097000, C341S098000
Reexamination Certificate
active
07549108
ABSTRACT:
Systems, methods and data structures are provided for representing robust data transmitted within a control system. The data structure includes at least two data fields identifying sub-modules and sub-modes of the control system, and optionally includes a third field for designating a primary operating mode of the control system and/or a fourth field representing a handshaking bit or value. The operating modes, sub-modes and sub-module designators are represented by values of the bits selected such that no single bit transition results in the selection of another valid operating state of the control system. As a result, single bit errors will not produce erroneous operating results. Similar concepts can be optionally applied to ensure that errors in contiguous sets of four, eight or any other number of bits do not produce valid states represented by the data structure.
REFERENCES:
patent: 3648238 (1972-03-01), Yarrington
patent: 6631489 (2003-10-01), Quach et al.
Katrak Kerfegar K.
Turski Michael P.
GM Global Technology Operations Inc.
Patel Kaushikkumar
Sough Hyung S
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